Low IF Receiver Reference Design
Related Products:
ADC16V130 Product Folder
LMK04031B Product Folder
LP5900 Product Folder
LP3878-ADJ Product Folder Description:
The SP16130CH4RB Reference Board demonstrates a low IF receiver subsystem application including an ADC16V130 analog-to-digital converter (ADC) and LMK04031B clock conditioner which provides digitization and clocking as used in wireless infrastructure systems.
This subsystem reference design provides single to differential conversion and lowpass filtering of the input signal with an optimized, double-balun network and high dynamic range digitization to parallel LVDS outputs using the ADC16V130. The 125 MHz low-jitter, LVPECL clock signal for the ADC is generated by a LMK04031B clock conditioner which demonstrates less than 250 fs of total jitter over the input bandwidth of the ADC.
The SP16130CH4RB is factory configured for evaluation of input signals between 5 MHz and 52 MHz. Each board is populated with an analog input network which has a cascade of baluns for single-ended to differential conversion, and a filtering network optimized for these frequencies.
Evaluation of this reference board is simplified with the WaveVision 5.1 Data Capture Board and WaveVision 5 software.
Contents:
- SP16130CH4RB reference design board
- PIC microcontroller board (ADC14PIC REV. A)
The source files for this product can be found on the RD-170 reference design folder including the following:
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