Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port
SCANSTA111 Product Folder SCANSTAEVK Evaluation Kit, demonstrates features of our SCANSTA111 and SCAN LVDS SerDes devices
The System Test Access (STA) Evaluation Kit provides a scaled-down representation of a typical multi-drop system for the purpose of
showing multi-drop and embedded JTAG testing, diagnostics and FPGA configuration. The kit is composed of a backplane with 3 slots
and several daughtercards to simulate various implementations of test architectures. The modular design allows simple demonstrations,
yet is expandable for use as a development kit where complex implementations of test architectures and new products can be evaluated.
The STA Evaluation Kit is intended to be generic and compatible with Industry standards and 3rd party software and hardware. Pre-
generated SVF files are provided for three example configurations, however, Netlists and schematics are also included if the user would
prefer to generate their own test vector files for their own hardware.
The STA Evaluation Kit supports the IEEE 1149.1 Standard for Boundary Scan Test as the back plane test bus. Analog test busses are
provided to support the IEEE 1149.4 Mixed-Signal test standard. The IEEE1532 Standard for In-System Programmability (ISP), which
utilizes 1149.1 for communication and control, is also supported.
Each Kit consists of the following components:
- End User License agreement
- Registration Instructions for file downloads and future support
- One Backplane
- Two SCANSTA111 Multi-drop Daughtercard(s)
- Two SerDes Daughtercards (demonstrating SCAN921023/1224)
- One Pass Through Card
- One Universal Power Supply
- Two Cat5 Patch Cords
It's also important to note what is not included in this kit as the following items are additional tools you will need in
order to drive the Evaluation Kit:
- Test vector generation tools. We do provide SVF vector sets for three specific configurations of the kit hardware, but
we do not provide the tools to generate additional tests.
- Test vector deliver tools and hardware. The kit expects the IEEE 1149.1 test signals at the backplane connector, and
we do not provide a way to drive the vectors from a processer source. You will need additional hardware that
interfaces to a PC (or other source) and converts the data stream to 1149.1.
- Diagnostic software for interpreting the test results. Typically the ATPG tool package includes some form of diagnostic
capability.
The vector generation, vector delivery, and diagnostics tools and hardware are available from our third party ATPG partners listed here.
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