High-Performance SMPTE Video Clock Module for Xilinx ML571 Serial Digital Video Board

National Semiconductor Enables the Xilinx Virtex 5 FPGA to Comply with SMPTE Jitter Requirements

The ML571-1982 CLK reference clock module features National Semiconductor`s highly-integrated multi-rate video clock generator. The LMH1982 can generate two simultaneous SD and HD output clocks genlocked to either the recovered H and V syncs from a Xilinx Virtex-5 LXT FPGA or from the outputs of an LMH1981 sync separator. Additionally, the LMH1982 provides an output Top of Frame timing pulse. In the event of a loss of reference, the device can be configured to default to either free run or holdover operation.

This reference design provides a proven video clocking solution for FPGAs that complies with stringent SDI jitter requirements, including the stringent SMPTE 424M standard for 3G-SDI. Integration, ease and flexibility of design, are demonstrated by the LMH1982 requiring a few additional components, and only one 27 MHz VCXO. An additional benefit of the LMH1982 is the programmable charge pump current control register for dynamic control of PLL bandwidth. A wide loop bandwidth can be programmed for faster PLL lock time or a narrow loop bandwidth can be programmed for maximum input attenuation.

See more details on the Video Timing Solutions page.

• AN-1971 - Application Note 1971 Triple Rate SDI IP FPGA Resource Utilization on the SDXILEVK/AES-EXP-SDI-G Reference Design
• AN-1893 - Application Note 1893 Demonstrating SMPTE-Compliant SDI Output Jitter Using the LMH1982 and Virtex-5 GTP Transmitter
• AN-1681 - Application Note 1681 Design Migration from the LM1881 to the LMH1980
• AN-1841 - Application Note 1841 LMH1982 Evaluation Board User Guide
• AN-1599 - Application Note 1599 LMH1981 Evaluation Board Instruction Manual
• AN-1618 - Application Note 1618 LMH1980 Evaluation Board Instruction Manual