Clock Jitter Cleaner With Cascaded PLLs and Integrated 2.0 GHz VCO (LVPECL/LVDS/LVCMOS Outputs)
LMK04000 Product Folder Description:
The LMK04033 is a precision low noise programmable jitter cleaner, clock multiplier, and distribution device. The LMK04033, with two internal PLLs and an extremely high performance internal LC voltage controlled oscillator (VCO), can be combined with a low cost VCXO module or an external crystal and varactor diode to achieve ultra low jitter performance over all bandwidths. The LMK04033 has redundant reference clock inputs with loss of signal detection, featuring automatic revertive, automatic non-revertive, or manual selection of the reference clock. The LMK04033 is ideal for clocking high speed high resolution ADCs, DACs, local oscillators and FPGAs with its wide range of low phase noise output selections. The LMK04033 is particularly well suited for all the clocking needs of remote transceivers, high performance instruments and other applications that demand ultra low jitter and phase noise using local clock sources.
Features:
- Integrated VCO for flexible low noise frequency multiplication
- Cascaded, integrated Integer-N PLLs. PLL2 normalized phase noise contribution is -224 dBc/Hz
- PLL1 supports up to 40 MHz phase detector rate. PLL2 supports up to 100 MHz phase detector rate
- Dual redundant reference clock inputs with loss of signal (LOS) detection and optional automatic switching after LOS is detected
- Typical root-mean-square (RMS) jitter performance at the VCO output is less than 200 fs (integrated from 100 Hz to 20 MHz)
- LVPECL, 2VPECL, LVDS, and LVCMOS outputs
- Five dedicated divider and delay channels
- Default Output Clock at startup, or after system reset, (Channel 2) to support application system configuration
- Pin compatible family of clocking devices
- 3.15 V to 3.45 V operation
- Package: 48 pin LLP (7.0 x 7.0 x 0.8 mm)
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