Evaluation Board for the LMH1982 Multi-Rate Video Clock Generator with LMH1981 HD/SD Video Sync Separator

Description:

The LMH1982 evaluation board platform was designed by National Semiconductor to demonstrate the excellent clock jitter performance of the LMH1982 multi-rate video clock and timing generator in a genlock application with the LMH1981 multi-format video sync separator. The evaluation platform consists of the LMH1982 evaluation board and a USB interface board, and can be controlled from a PC using Nationals LMH1982 evaluation software.

The board provides input ports to apply analog or digital input reference signals and SMA output ports to transmit the LVDS SD and HD clocks. Headers and test points are provided to access other important I/O signals, such as the output Top of Frame (TOF) pulse timing generated by the LMH1982. The external VCXO and loop filter components are located on the top side of the board for easy modification and optimization of circuit performance. The on-board DIP switches can be used to control various input modes to the LMH1982, such as device reset and signal gating (tri-state) of the LMH1981 output syncs.

Contents:

• A Fully Assembled LMH1982SQE Evaluation Board
• LMH1982SQE Data Sheet
• LMH1982SQE Evaluation Board Application Note (AN-1841)
• LMH1982SQE Evaluation Software User Guide
• USB Interface Board
• USB Cable

• AN-1971 - Application Note 1971 Triple Rate SDI IP FPGA Resource Utilization on the SDXILEVK/AES-EXP-SDI-G Reference Design
• AN-1893 - Application Note 1893 Demonstrating SMPTE-Compliant SDI Output Jitter Using the LMH1982 and Virtex-5 GTP Transmitter
• AN-1681 - Application Note 1681 Design Migration from the LM1881 to the LMH1980
• AN-1841 - Application Note 1841 LMH1982 Evaluation Board User Guide
• AN-1599 - Application Note 1599 LMH1981 Evaluation Board Instruction Manual
• AN-1618 - Application Note 1618 LMH1980 Evaluation Board Instruction Manual