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Signal Path Designer®
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Signal Path Designer
The Signal Path Designer quarterly features articles that cover design techniques for signal-path applications.

 

Publication PDF
#114: Continuous-Time Sigma-Delta A/D Converters

240KB
#113: A 3 Gbps SDI Connectivity Solution Supporting Uncompressed 1080p60 Video

2.7MB
#112: Adaptive Speed Control for Automotive Systems

304KB
#111: Selecting Amplifiers, ADCs, and Clocks for High-Performance Signal Paths

913KB
#110: Extending the Signal Path Over Data Transmission Lines

552KB
#109: Generating Precision Clocks for Time-Interleaved ADCs

660KB
#108: Low-Voltage Current Loop Transmitter

#107: Delay Calibration of Signal Path Interconnect-
In Remote Radio Head (RRH) Basestations and Other Applications

#106: Timing is Everything - The Broadcast Video Signal Path
#105: LIDAR System Design for Automotive/Industrial/Military Applications
#104: Improving Machinery Vibration Analysis
#103: Understanding High-Speed Signals,Clocks, and Data Capture
#102: Maximizing Signal-Path Performance

#101: A Walk Along the Signal Path

Also visit national.com/signalpath		  

 

 

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Signal Path #114: Continuous-Time Sigma-Delta A/D Converters

Overview:
A/D Converters (ADCs) perform two basic, fundamental operations: discretization in time and discretization in amplitude. The two functions are shown conceptually in Figure 1, though the actual ADC may not be structure as such.

The first operation of the ADC is to discretize in time, or sample, the continually time-varying input analog signal. The input signal is typically sampled at uniformly spaced times at a frequency of fS, and the samples are thus separated by a period TS = 1/fS. Once the input signal is sampled, the resultant signal exists only as impulses at the sampling interval, kTS. However, this sampled signal is still able to assume an infinite range of values, and therefore cannot be represented precisely in a digital form.

 
WHAT'S NEW
Featured Products

PowerWise® High-Speed Amplifiers

PowerWise® High-Speed A/D Converters

PowerWise® Clock Conditioners

  • Clock Conditioner, Integrated VCO
  • Clock Conditioner, Integrated PLL
  • Frequency Synthesizer System, Integrated VCO

 

Design Tools

The Signal-Path Designer® is published every other month, the Signal-Path Designer newsletter's feature articles cover signal-path design techniques:

 

Application Notes
  • AN-1558 - Clocking High-Speed A/D Converters
  • AN-1704 - High-Speed ADC Input Driver
  • AN-1716 - Driving High-Speed ADCs
  • AN-1718 - Diff Amp Apps Up to 400 MHz
  • AN-1719 - Noise Analysis - Fully Diff. Amp
  • AN-1721 - High-Speed ADCs - Interfacing, Driving, and Clocking
  • AN-1727 - Calibrating the ADC083000 Family of Ultra High-Speed Converters
Reference Designs

The reference designs include ADCs, front-end amplifiers, timing components, and power supply regulation.

  • ADC083000 - Lowest Power 8-bit 3 GSPS Data Acquisition System
  • ADC14DS105 - Low Intermediate Frequency Receiver System
  • ADC14V155 - High Intermediate Frequency Receiver System

WaveVision 4.0 Data Acquisition and Analysis Software
Test and evaluate A/D converters with National's easy-to-use WaveVision 4.0 software, which supports National's latest ADC evaluation boards.

Articles

Challenges of clocking a high-definition world – Part I: foundational concepts
Clocks and jitter affect all aspects of system performance, including signal-to-noise ratio (SNR) and throughput; understanding and implementing today's ever-higher-speed clocks is crucial.

Challenges of clocking a high-definition world – Part II: A system applications perspective
Part II examines issues specific to communication systems that are evolving from multi-module, single channel architectures to single-module architectures. The article also shows how to analyze the impact of multiple, uncorrelated noise sources on overall SNR, relate this to clock jitter, and present an example that illustrates the different jitter requirements for different ADC resolutions.

Use in-the-loop gain control to extend dynamic range.
Modern communications systems are demanding more dynamic range than current analog-to-digital converters (ADCs) can support. One way to gain system dynamic range is to use a digitally-controlled variable gain amplifier (DVGA) with a high-speed, high-resolution ADC in a digitally-controlled AGC loop.



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