Control scheme uses hysteretic window to control the output voltage. When the output voltage is below the upper threshold of the window the LM2621 switches with a fixed duty cycle of 70% at 400kHz. Current is ramped up during the first portion of the switch cycle, inductor current IL1& IL2 flows thru the FET (internal to LM2621) and stores energy in the inductor. During the 2nd portion of switch cycle FET (internal to LM2621) turns-off diode D2 conducts carrying the inductor current, current in L2 is the load current. When LM2621 switches continuously, the output voltage ramps up. When output voltage hits upper threshold limit LM2621 stops switching completely and output voltage is allowed to droop.

Note, Oscillator switches at 400kHz but the output ripple of the design is based upon the hysteresis of the gated oscillator as well as the load current.

This design is know for its simplicity and fast transient response. Ripple voltage generated across C4 is sensed by the feedback pin. C3 will allow the high frequency ripple to appear across the feedback pin without being attenuated by R2 & R4.

SEPIC topology provides low input ripple due to the input inductor and allows the output to be stepped up or down with no inversion in output polarity.

High switching frequency and high peak currents require that layout is done properly. A few points to note are:

1) Decoupling capacitors are close to IC pins as possible. Keep separate power ground plane.

2) Input and output capacitors are connected to the power ground plane; all other capacitors are connected to the signal ground plane.

3) High current paths are very short.

4) Feedback connections are short and direct and routed away from any noisy traces (i.e. switch node).