High IF / High Sensitivity Radio Receiver Design

High Sensitivity Radio Receiver Design Webinar

Hello everyone and welcome to today's webinar. I'm Tom Floyd, I'm your moderator for today's session. With me is Bobby Matinpour, Marketing Manager, Wireless Infrastructure Solutions, welcome back Bobby.

BOBBY MATINPOUR: Thank you.

TOM FLOYD: And Scott Kulchycki, Marketing Manager, High Speed Signal Path, welcome Scott.

SCOTT KULCHYCKI: Nice to be here, thank you.

Panelists

TOM FLOYD: And as always one quick housekeeping thing to keep in mind before we jump into our conversation today. We really want today's session to be interactive so for those of you who are joining us live and you're logged into the Go To Webinar interface, just make sure to type your questions directly to me and I'll ask those on your behalf. And with that said I think we can go ahead and get started.

BOBBY MATINPOUR: Thank you Tom. So as you can see today again today we have a fairly packed agenda. We're going to first dive into the base station market trends and needs.

Objectives

Then we'll move into reviewing the radio receiver basics and more in detail on the receiver architectures and tradeoffs. We'll focus in on the high-IF receiver requirements. That includes RF and IF blocks, filtering, more specifically the anti-aliasing filter, and ADC specifications. And then we'll move into demonstrating an example using National's portfolio of these newly-released high-performance components, such as ADC16DV160 which is the 160 megasample high-performance 16 to ADC. LMH6517 which is a low-noise, high-linearity DVGA. LMK04000, it's a high-performance clock jitter cleaner. And we will conclude with a call to action.

Base Station Market Trends & Needs

There are two major underlying drivers for the next generation infrastructure. These are the needs of the service providers. They include network efficiency and lower total cost of ownership. This is the major things that the service providers right now are pushing the base station vendors for providing and helping them achieve. The point is to improve and increase the number of user channels for a given radio and at the same time improve the infrastructure hardware deployment and operations so that they can reduce the total cost of ownership.

TOM FLOYD: Now how do these translate to end user benefits?

BOBBY MATINPOUR: Generally that means you pay less for your services.

TOM FLOYD: Okay.

BOBBY MATINPOUR: So you can either maintain the service for a low cost or get more services for a less added. And this allows those service providers to compete with each other on cost while providing more services.

TOM FLOYD: Okay, got you.

Base Station Market Trends & Needs

BOBBY MATINPOUR: And the way this translates to the requirements of the next generation base station is developing flexible and high-capacity base stations. And its three major characteristics for a base station that allows that to happen is multi-carrier, multi-standard, wideband base stations. All of these three characteristics add on top of enabling higher capacity per radio. And making the deployment of the infrastructure more flexible so they can be deployed along with the legacy infrastructure and it streamlines the development and maintenance for the base station OEMs and the service providers.

TOM FLOYD: Now you mentioned capacity in the Clock and Timing Webinar before. Is this the same thing?

BOBBY MATINPOUR: The driver is the same. In the Clock and Timing Webinar we actually were talking about improving or increasing the number of bits per hertz, like moving to a higher order of modulation. In this case we're actually -- so you're improving the capacity per link here, we're increasing the number of links per radio. So it's the same thing but different way to get at it.

TOM FLOYD: Okay.

SCOTT KULCHYCKI: So Bobby, when we're discussing these different types of base stations, these multi-carrier, multi-standard and wideband, is one system going to be exclusively multi-carrier or are they going to incorporate all of these different features?

BOBBY MATINPOUR: I would say the trend is that all of these will be included down the road in one single base station.

SCOTT KULCHYCKI: Okay.

BOBBY MATINPOUR: So right now there might be one that does multi-carrier but it's not multi-standard but that's the trend they're going into, to include all three.

Radio Receiver Basics

Good questions, so now we're going to let Scott go over through some of the radio receiver basic and details.

SCOTT KULCHYCKI: Thanks, so Bobby's discussed some of the high-level trends and directions that the market is going and what we want to do with this webinar is really go through an example of how you can design a subsystem like this.

Radio Receiver Overview

And so the first thing we really want to talk about is what is the function of one of these radio receiver subsystems? Well ultimately what you're doing is you're trying to capture an RF signal from the air and translate it into lower sort of digital bits. And the reason you do that is you can then process the data and get to your data, your video and your voice off of your cell phone. So the applications we're actually going to be discussing here really are focused on things like cellular base stations and repeaters, point-to-point links and also microwave backhauls.

TOM FLOYD: Just too kind of summarize then, so all of these do apply to cell phones.

SCOTT KULCHYCKI: Not cell phones. So in cell phones or smart phones you do have receive and transmit functionality but the main difference is, in a cell phone all that functionality is going to be integrated into a single chip. And the cell phone smart phone, the performance requirements are actually much lower than what we're going to be talking about here. This is really high-performance stuff for the most demanding applications.

TOM FLOYD: Got it.

Radio Receiver Figure of Merit

SCOTT KULCHYCKI: Okay so if we're designing this subsystem, really we want to be able to tell, is this system better than an existing solution? And the way that you're going to measure the performance of a system like this is to really look at something called receiver sensitivity. So that's the figure of merit we're going to be using in our analysis. Now a cellular base station typically operates under one of two conditions. It can either be in the normal or non-blocking condition or it can be in the blocking condition. Now Bobby actually came up with a great analogy for how this works. If we're talking the non-blocking condition, what you're really discussing is what's the smallest signal that we can receive in the absence of anything else? And so Bobby's analogy was that it's like listening to someone whisper in a room. How quiet can that person whisper and you can still hear their message? Now on the other side when we go to the blocking condition, you're talking about having a really strong signal that could possibly interfere with your reception of the small signal you're interested in. And going back to this analogy, this is like when I phone Bobby at home and I can hear his daughter screaming in the background.

TOM FLOYD: Is it that bad?

SCOTT KULCHYCKI: I would assume that Bobby really wants to hear my important message, so the sensitivity is a question of, how quietly can I talk and Bobby's still going to hear me while his daughter's yelling in the background?

BOBBY MATINPOUR: And he's pretty soft spoken too.

SCOTT KULCHYCKI: Thank you.

TOM FLOYD: As opposed to your daughter. So what if the stronger signal is from a cell phone that's on a different network, so if it's on Verizon versus Sprint?

SCOTT KULCHYCKI: Well it's not even a question of what service provider you're working with. So let's assume in the first case that we're just talking about Verizon as your service provider. Inside the bandwidth we're looking at there are going to be a lot of different carriers, one of them is the one you're interested in. There might be some other Verizon customers that are going to be in that band, so those are interferers. Getting directly to your question, you could also have AT&T customers that would be interfering but it's ultimately a question of, what signal do you want and everything else is an interferer.

TOM FLOYD: Okay, makes sense.

Receiver Architectures

SCOTT KULCHYCKI: Okay, so we've covered some of the high-level stuff. Now Bobby's going to start digging into more detail on the architectures.

BOBBY MATINPOUR: So there are two major architectures for receivers. The first one that's called homodyne receivers or direct conversion. This is becoming more and more popular over the last few years especially for the handset market since it lends well to integration. This architecture is fairly simple and what it does is directly converts to RF that you catch through the antenna down to the digital bits in baseband, the quadrature signals. It's simple but it's generally difficult to get very high performance. The heterodyne architectures, it first converts that RF signal to a low-frequency intermediate frequency and it could be using single or multiple stage of the down conversion. This process, obviously as inherent to it, it's more complex but it does yield a better performance.

Homodyne (Direct Conversion) Receiver

So a little bit more detail on the direct conversion receiver, as I mentioned, the advantage is that it's less complex. You have actually really no IF filtering, everything's done in baseband. So you have baseband filtering which is generally easier to do than IF filtering. You don't have an image to deal with because you're not using an IF. You don't have an IF conversion stage, so you're directly going to baseband, so no image rejection filters are needed. This advantage is that as you can see now after the mixer you have -- or actually at the mixer you have two particular paths. You have the two paths, I and Q channels, and you need to maintain very good phase and amplitude balance between the two. In addition your local oscillator frequency they're using to mix down the signal is the same frequency as your RF band of interest. So it can easily leak out through the antenna, through the RF filters, and generally that's a no-no. When they test the equipment before they deploy it, they do test all the radiation that comes out of it and that you cannot radiate in-band. The other issues that come up using a direct conversion that's very critical is DC offset and 2nd order inter-modulation products. In general a radio that uses IF, these are out-of-band signals. In this case it's an in-band signal and you have to deal with it.

TOM FLOYD: So in this diagram I'm looking at you've got I-channel and Q-channel. Are those redundant, are those carrying the exact same information?

BOBBY MATINPOUR: No, actually these two combined make up the consolation from which the information is extracted. So you have an IQ consolation -- that you need the information from I-channel and Q-channel unperturbed so that you can adequately receive it.

BOBBY MATINPOUR: So by themselves they're useless.

Heterodyne Receiver

BOBBY MATINPOUR: In the heterodyne receiver the advantage is that you do have multiple stages of filtering, allows for a lot of freedom in design and generally achieves higher performance. DC offset and secondary modulations that are a problem in direct conversion are not a problem here. They're out of band, you can easily cap couple them or when you do IF filtering, you filter them out easily. This disadvantage or the flipside of the coin is there's some good about having multiple stages of IF. Here it basically makes it more complicated. So you have multiple filters and IF stages mixing, which also lends itself to more complex frequency planning, so frequency planning is also more difficult.

TOM FLOYD: So when you talk about multiple stages, how many stages can this type of receiver have?

BOBBY MATINPOUR: Good question, generally for RF frequency range of say 700MHz or say below a couple of gig, you're talking about one stage of IF down conversion. For frequencies above that, in microwave frequencies, I have seen up to a couple. Its hardly seen more than two stages of down conversion.

TOM FLOYD: More than two, okay.

SCOTT KULCHYCKI: So what are the typical, in these sorts of applications, what are the RF frequencies you're talking about?

BOBBY MATINPOUR: Okay, for a cellular base station, you're talking about several hundred megahertz all the way up to 2.5GHz. I would say the most popular ones are 900MHz to 2 gig. And for the microwave backhaul and the other applications you mentioned generally go into multiple gigahertz, so it could be 6GHz up to tens of gigahertz.

SCOTT KULCHYCKI: Okay.

Filtering in Heterodyne Receivers

BOBBY MATINPOUR: So we're going to talk a little bit more about various different heterodyne architectures. We have here in the high-IF example, high-If, we're talking about IF frequencies above 100MHz. Low-IF example that we'll cover next will be IF frequencies below 100MHz. And what I'm trying to highlight here is all the unwanted signals that show up at the antenna that you have to reject or filter as you down convert to an IF. Now it goes without saying that since we're talking about a high-performance system, we're using a heterodyne architecture here, not a direct conversion. As you could see on the bottom right of the screen, you seen you have this wanted signal that's highlighted in green and you have all the other stuff that are non-wanted including the out-of-band interferers, the image and the mixer two-two spurs. Now the goal of the front end stage of filtering, the RF filters, is to filter the image and the two-two spurs and the out-of-bound blockers before they get to IF.

Filtering in Heterodyne Receivers 

More specifically now, if you look at the IF down on the bottom left, signals such as image or the two-two spur will end in-band. So if you need to reject them, you have to do it either before the mixer or inherently by the performance of the mixer. So once they end up in IF, there's nothing you can do about them. Other things like out-of-band interferers that are not in the image or the mixer two-two spur frequency ranges, you can do further filtering in the IF. The other thing that shows up in the IF is that if you have an in-bound blocker, which you will in the case of multi-carrier GSM or in this next generation of standards, it will generate a 2nd order or 3rd order harmonics in the IF stages. That needs to be filtered out and that's highlighted in the IF on the bottom left as well. And then last but not least, before you get to the ADC in the IF, you do need to filter the wideband noise to be able to really make the best of the ADC performance that you have.

SCOTT KULCHYCKI: So you're talking about harmonics and images and various signals. I'm a huge fan of the webinars you've done for clock and timing before and I remember on those you talked about the importance of phase noise on the clock on the performance of the ADC. Is that captured in this discussion you've had?

BOBBY MATINPOUR: We haven't captured it but it's a very good point. There is some limitations to how high the IF frequency can be, one being the clock jitter requirements. As you increase the input frequency to an ADC, the clock phase requirement becomes more and more stringent, so there's a point where it becomes unreasonable. So there are some limitations there, very good point.

Filtering in Heterodyne Receivers

So now we did the high-IF example, we're going to move into the low-IF example. In low-IF you will see that the yellow frequency down at the bottom right again is moved closer to the RF band of interest and the consequence of that, both the mixer two-two spur and an image band are moving closer. So the filtering becomes more and more difficult because now they're much more closer. And as a consequence of that, you can see that now on the IF band the mixer two-two spur and the image power level is higher, therefore reducing the sensitivity. So to get the same sensitivity you would get with a high-IF example, you would need to have a much better RF filter or much better mixer.

Filtering in Heterodyne Receivers

And in addition to that you'll see that the in-band blocker now, the second harmonic of it that's generated by the IF amplifiers is now much closer to the IF band of interest as well. So they get filtering, that secondary harmonics becomes more difficult as you go into the low-IF architecture.

SCOTT KULCHYCKI: So I guess just to be clear in this analysis, you talked about the 2nd and the 3rd harmonic. I guess in this example the 3rd harmonic is just so much RF frequency.

BOBBY MATINPOUR: Yes, we didn't mention it because really the bottom like ends up being the 2nd harmonic of the in-band blocker.

Frequency Planning for a High-IF Receiver

SCOTT KULCHYCKI: Okay, so I guess Bobby you've given some example looking at filtering. The next thing that we need to do when we're building this system is handle the frequency planning. So when we talk about frequency planning, we're really talking about picking an IF frequency and picking a sampling rate for the ADC. Now it turns out unfortunately that there are conflicting requirements. So if we take a look at the filtering, the RF filter and the IF filter are actually both much easier to implement for a higher IF. Similarly the IF filter actually does better with the higher sampling rate on the ADC, so you've got on one hand the filters require high-IF and high sampling rate. So now we take a look at the signal path components, the amplifier and the converter. And what you find is that, for the data converter, speaking generally, as the sampling rate of an ADC increases, its performance is going to gradually degrade. Similarly as the input frequency to an ADC increases, the performance will go down a little bit. If you look at an amplifier, there's obviously no sampling rate on an amplifier but the amplifier performance is going to roll off as the input frequency goes up. And so on one hand you have the filters that want high-IF, high sampling rate. On the other hand you've got your ADC and amplifier that want low-IF and low sampling rate. And so this is one of those classic sort of conflicts of design requirements and this is a tradeoff that requires special attention.

IF Filtering - Selecting a Sampling Rate

So just getting into a little more detail on the IF filtering, let's look at how the sampling rate affects the IF filtering requirement. So when you're using an ADC, you're operating at some sort of sampling rate, fs, and that's what's shown on the top of the slide here. We have different colored bars and the different bars really correspond to different Nyquist zones. Now when you use an ADC, after the sampling operation occurs, all of those Nyquist zones are going to fold down on top of each other. So in this diagram you can see, let's say that the signal we want is the gray signal, that's our desired signal. Unfortunately that means that those two red signals in the other Nyquist zones after the sampling operation are going to sit on top of our desired signal, so that's bad. So what we need to do is use a filter to attenuate the red signals. So let's assume we need some level of attenuation and that's what's drawn on the top of the slide. Now if we take our system and we increase the sampling rate of the ADC, this is now the bottom of the slide. What you can see is that those red signals that you were worried about have been pushed further away from your desired signal. You still want to attenuate them because after sampling again they're going to fold on top of the desired. But the basic idea is now the distance from your desired signal to the signal you're worried about is much greater and that means you can have a much slower roll-off on your filter which makes it easier to design.

BOBBY MATINPOUR: So what is the -- in this case it looks like you doubled the sample rate. Can you talk to a little bit about the limitations of why we're not increasing the sample rate instead of 2x by 5x to make this a little easier?

SCOTT KUKCHYCKI: Right, or 10x or 100x would be even better. I mean the reason you can't do that is again with ADCs it's generally the case that, as you increase the sampling rate, a couple of things are going to happen. The first is that the power of your ADC is going to increase pretty quickly with the sampling rate. The second is that again in broad terms the performance of the ADC is going to degrade a little bit as the sampling rate increases. And the final concern is really that, at a high sampling rate, that puts a lot of more stringent restrictions on the amplifier that's driving the ADC and so there's no theoretical limitation to the sampling rate. It would be great if we could sample at a couple of terahertz but there are practical concerns why that can't actually be done.

BOBBY MATINPOUR: It's limited by what's available on the shelf really or at the silicon.

SCOTT KUKCHYCKI: Exactly, right.

IF Filtering - Selecting an IF

Okay so again continuing with the IF filtering, now let's take a look at the IF effect, so we made the claim that the filtering is easier with a higher IF and we can look at why that's the case. So now we look at the situation again where we have various Nyquist zones and Bobby mentioned this possibility of having an in-band blocker. So we've got our desired signal at the top of the slide and there's this large in-band blocker. Now the amplifier in your IF filter that comes before the ADC is actually going to generate a 2nd harmonic and as you mentioned a 3rd harmonic but the 2nd is key so we'll look at the 2nd harmonic. So in this diagram the 2nd harmonic is the red tone. And again as you can see this red tone, after we do the sampling, it's going to fold on top of our desired signal and so we're going to need to attenuate this red signal. So now let's take a look at the bottom of the slide where we say, let's increase the IF. So if we increase the IF, what you can see is that the 2nd harmonic is similarly pushed out and we end up sort of at the same argument we were on the previous discussion. Is that you now have a much wider distance in terms of frequency over which to roll-off a certain amount of attenuation and that means the filtering is easier.

TOM FLOYD: So can you tell us a little bit more about why a decreased slope filter is easier to implement?

SCOTT KULCHYCKI: So speaking in broad terms the reason is that a more gentle slope means you can use a lower-order filter. And the lower-order filter is easier to design and it usually has less sort of attenuation through the path, so it's just an easier filter in general.

TOM FLOYD: Okay.

Multi-Carrier Multi-Standard 20-MHz Receiver Example

SCOTT KULCHYCKI: Okay, so we've looked at some of the high-level details that you need to do before you do any sort of design and now we're going to get into a more specific example and we're going to look at a multi-carrier, multi-standard, 20MHz bandwidth receiver.

Multi-Carrier Receiver Design Example

Okay, now remember we're designing this thing and we want to be able to measure how good it is, so we're talking about the sensitivity. In this case we're going to design the system so it can handle multi-carrier GSM signals. Now the reason we're going to do that is that actually multi-carrier GSM is the most difficult spec to meet. So if you can meet multi-carrier GSM, then you can meet WCDMA, you can meet LTE. It's the most difficult, so that's what we're shooting for. So when we're talking about sensitivity, we're worried about the sensitivity in our channel bandwidth of interest. Now in GSM the channel bandwidth is 200kHz and that's why that's on this slide here. So we're talking about the sensitivity of the 200K bandwidth, so a couple of numbers that we need here are shown on this slide. The first is that, remember we have these two conditions, so under the normal non-blocking condition, we need to be able to receive a signal that's as low as minus104 dBm power. Now in the blocking condition where we have this in-band or out-of-band blockers to worries about, we know that those blockers can be as big as minus16 dBm and in that case we need to be able to resolve a signal that's as small as negative 92 dBm in power. Now the last piece of information we need before we keep going on this is you need some level of difference between your carrier power and all the other junk in your channel to be able to receive the signal, decode it and in this case we need 9 dB. So we need 9 dB of this carrier-to-noise-and-interference ratio. So the second step we do is again revisiting this frequency plan concern, so we need to pick a sampling rate and an IF. Now it turns out that in these systems, 15.36MHz is a very common frequency that shows up and so a lot of the time these systems are designed with either 76.8 or 153.6 Msps. Now we've just gone through the exercise that we know the higher sampling rate is better, so that's what we're going to do for this example, is pick 153.6. So the last thing we need to do is pick an IF and we've seen already that the filtering is easier with a higher IF. So for this example we're going to pick a high-IF in the 3rd Nyquist zone and we're going to send her our bandwidth at 192MHz so these are some sort of high level details. I'm going to pass off the hardware to Bobby to do math.

Multi-Carrier Receiver Design Example

BOBBY MATINPOUR: So, yes, we get into a little bit of the mathematical details here. So as Scott highlighted, we want to look at the sensitivity under two conditions, the normal and the non-blocking and the blocking condition. In the normal condition what becomes really the bottleneck in these types of systems is the noise performance, the noise figure of the receiver. And what we need to find out, what we need to figure out is what is the noise floor of the receiver and that can be easily calculated. We start from the basic noise figure, thermal noise in that bandwidth of 200kHz which is about minus 121 dBm. Now as Scott highlighted, we need to be able to resolve a signal as low as minus104 dBm. So that means that if we have any rise in the noise floor beyond 8 dB, we will not have the adequate carrier-to-noise-plus-interference ratio of 9 dB. So if you go from minus121 plus 8 dB of noise figure, what you'll get to is minus113 and that's the limit because 9 dB above that is minus104. What you want to take away is a noise figure of 8 dB is what you need for that receiver.

SCOTT KULCHYCKI: So you're saying the noise figure is sort of a measure of how much additional noise you're tacking on to...

BOBBY MATINPOUR: You're tacking on with your receiver.

BOBBY MATINPOUR: Yes, exactly, so here what we were targeting is, and especially in normal condition when noise is a limiting factor, is less than 8 dB of noise figure. Again in this kind of scenario it's really not a big limitation however we want to make sure that we don't have too many gain stages and saturating the next polling so we need to worry about that. Under the blocking condition it's completely opposite actually. Now noise is not a very critical spec or limitation but the limitation is actually the blocker and here, as Scott mentioned, the blocker level is about minus16 dBm. We also know that -- so the limitation here is really the maximum gain and that's defined by the blocker level and the full-scale input of the ADC, the block that Scott mentioned minus16 dBm. And general full-scale ADC input is about 4 dBm. And typically we want to stay about 4 dB backed off from that, so what we're talking about is a negatice16 dBm plus a certain gain to get to 0 dBm. You cannot have any more than that because then you'll saturate the ADC, so we're talking about 16 dBm gain. So the key takeaways from this slide is that noise figure of 8 dB is the maximum you can have. You want to stay below that for normal condition and you're stuck with a gain of 16 dB on the blocking condition.

TOM FLOYD: We've definitely seen a lot of numbers and formulas in the past two slides. If folks want to learn more, have additional questions kind of about those numbers, what's the best way for them to learn more about that?

BOBBY MATINPOUR: Well the numbers that Scott mentioned that are coming off the 3GPP standards, so that's available on the Web. They can I guess Google that and search it and find out.

TOM FLOYD: Okay, great.

BOBBY MATINPOUR: A lot of this analysis like cascaded noise figure analyses are well published in books and articles.

TOM FLOYD: Okay.

BOBBY MATINPOUR: And obviously they can contact us if they have any specific questions as well.

TOM FLOYD: Got it, great.

Multi-Carrier Receiver Design Example

BOBBY MATINPOUR: So now we're going to dig a little deeper and talk about the ADC criteria of performance under the blocking condition. In the blocking condition, we highlighted that we are using a gain of about 16 dB and, as Scott highlighted, we must achieve the sensitivity of minus92 dBm. So that means that, if you take a minus 92 dBm and input to the antenna, add to it 16 dB, you end up about minus76 dBm. We also highlighted we need a 9 dB carrier-to-noise-and-interference ratio. So whatever extraneous harmonics and spurious signals that are generated by the ADC must be 9 dB below the minus76 dBm signal input to the ADC so that we can resolve it. And that translates into minus85 dBm. And relative to the full scale of the ADC, we're talking about 89 dB full scale SFDR. So that means all the spurious tones of the ADC need to be at below minus 85 dBm so the performance ADC spec'd at 89 dBFS SFDR. ADC16DV160, which is our newly-released high-speed, 160 megasample per second, 16-bit ADC, is really right now the only ADC in the market that meets this requirement at high-IF. In fact our specification is 91.2 dBFS and 192MHZ input-IF, the input-IF that Scott mentioned earlier.

SCOTT KULCHYCKI: So I notice in this slide, you know, you're going through the analysis, there's a question mark on the noise figure. So noise figure doesn't matter at all when you're doing this SFDR?

BOBBY MATINPOUR: So my recommendation is, when this work is being done and the first order, noise figure generally not limiting or bottleneck. But once the full system is designed, it's always very crucial to revisit this and make sure now you haven't done something incorrectly and have noise figure now become the limitation. Generally it's not if the work is done correctly.

Design Example: RF Front-End

So now we're going to move into putting some numbers and components along with these blocks. So generally what designers do especially when it's on a high-performance system, they go look at the catalog and see what are the best components that they can pick so that they can have adequate margins in the first-ordered design. Now after that they can go in and see where they have margin and they can cut back. So what we put here are some state-of-the-art components. Antenna filters, I've assumed a 1 dB loss or else a 1 dB noise figure each of those. LNA gain of about 16 dB. You can find one that is more or less but this is a good number. A noise figure of generally below .8 dB and we're assuming a passive mixer, so there's some loss to the mixer. And as you can see I've put output P 1 dB or output 1 dB compression point for these blocks. A lot of times people look at this third order in modulation products. In this case you're looking at 1 dB compression because it makes our analysis for this webinar a little easier. So now we got the front end piece sorted out. Now we're going to look at the IF filter chain and DVGA and so on.

Design Example: Blocking Condition

In the IF filter chain, what I recommend for these types of applications is for us to look at two stages of filtering to have some degree of freedom. And you can see that each filter is generally a soft filter with a pretty high loss, about 20 dB loss in this case. You need to have some buffer amplifiers or IF amplifiers to overcome that loss. So the cascaded numbers for this two-stage filtering is looking about no loss through the filter but about 9 dBm noise figure. Its being followed that by the DVGA. I've put question marks right now because we want to calculate that, back calculate it and the anti-aliasing filter, generally we're talking about LC filter. I'm being conservative, again about 5 dB loss through the filter. So using these numbers, I know I need 16 dB of gain in the blocking condition. I can back calculate what'll be the DVGA gain requirement under blocking condition which ends up being about 14.5 dB.

SCOTT KULCHYCKI: So you go through this calculation and I guess one of the things I wonder is the DVGA gain range. I know that sort of from experience and discussions that designing a fixed-gain amplifier or even a unity-gain buffer, you can generally get sort of better dynamic performance than if you need to be varying the gain. So isn't it possible in a system like this that you frontload the gain, put more gain on the ONA and then relax the DVGA requirements?

BOBBY MATINPOUR: It's possible but when we do that, generally you end up saturating the plot following the stages. So you have to be careful how much gain you put in the front of the chain before you actually do the filtering and get rid of some of these unwanted signals. So too actually -- so you bring a good point. So what I'm actually showing right now here is for the blocking condition specifically, what you need to do is actually run the blocker throughout the receive chain and see if there is a situation where you're saturating a stage.

Design Example: Blocking Condition

Now the rule of thumb, at least for the first order, is that you want to be 10 dB or better below the output compression point of each block. So if you trace the blocker through, you could see that going through minus 16 dBm into the antenna, walk through the path, you can see and in all stages where about 10 dB or more roughly below the compression point of that stage, so we're not saturating it.

TOM FLOYD: You may have already answered this question but just too kind of summarize, can you use a variable-gain LNA?

BOBBY MATINPOUR: That's a good question actually. A variable-gain LNA would actually ease some of the burden of the DVGA however in these systems generally, especially in the normal condition, there is a lot of emphasis on noise figure. The variable-gain LNAs generally do not provide the same level of low noise figure that's needed as the fixed-gain LNAs. That's because you will compromise performance. That's why we generally don't use it.

TOM FLOYD: Got it.

SCOTT KULCHYCKI: And so looking at this analysis, again you've got this 4 dB back-off from full scale. Why wouldn't you run the ADC at the full input range in the ADC to get the full benefit of its performance?

BOBBY MATINPOUR: That would be nice but the problem is, as we mentioned, there's a normal and a blocking condition for these receivers. And when you're switching from one to another, say a blocker appears and the system detects it, there's usually a time lapse where the system is adjusting to DVGA gain. And if that takes too long, you could actually, the blocker could ride and damage the ADC or damage the link basically and you'd drop the call.

SCOTT KULCHYCKI: Okay.

BOBBY MATINPOUR: That's a very good question.

Design Example: Normal Condition

So we talked about the DVGA in particular and on the blocking condition we calculated 14.5 dB of gain that was required. Under the normal condition what's become most critical is noise figure, so we want to actually search out and find the best noise figure we can find out there from DVGA and what we have there is LMH6517. This is the device that was released close to a year ago and this device features very high linearity adequate for this application and very low noise figure of 5.5 dB. So now with all the pieces filled in, the only thing remaining is the ADC. We did mention earlier that we want an overall noise figure of less than 8 dB for the whole block. So now if you use the commonly-used cascaded noise figure analysis, you can back calculate that. To meet the requirement of less than 8 dB overall noise figure, you would need an ADC noise figure of 27.5 dB. Now just to highlight the impact of some of these components, if you take a competitor's DVGA with an inferior noise figure of about 8 dB. You will see that that directly translates into 26 dB of noise figure for the ADC so you would need to have an ADC with 1.5dB better noise floor.

SCOTT KULCHYCKI: Okay, so you've gone through this analysis and you've said that if we change the DVGA noise figure by 2.5 dB, the ADC noise figure only changes by 1.5. I guess I would have expected everything to scale, the ADC noise figure should've changed by 2.5. Why is that not the case?

BOBBY MATINPOUR: Good question. Generally in the cascaded noise analysis, when we look at a noise figure, noise that's added further up down the chain gets divided by the gain in the preceding stages, so it's not a 1:1 translation. So if 2.5 dB in this case, noise figure later in the stage translates into only 1.5 dB noise figure for the over all. Now if you did add noise to the LNA or like the filter, if it was a higher filter loss that would directly translate into the noise figure of the receiver. So it does make a big impact on the LNA side but not further down the chain.

SCOTT KULCHYCKI: So this is again -- actually I guess this goes back to your question Tom about why you would do a variable-gain LNA? So it sounds like the LNA is the critical...

BOBBY MATINPOUR: LNA is very critical for this, correct.

TOM FLOYD: Now kind of a question and comment that's come in, can you talk a little bit more about other target applications for folks who might not be calling on GSM base station customers?

BOBBY MATINPOUR: Yes, generally the other target applications, anything UMPS, WCWCDMA, these applications don't have the stringent blocker requirement that multi-carrier GSM has. And really if you notice we started with the blocker because that makes the things the most difficult. So if for example under the blocking condition, since the blockers might have 16 dB and we're limited with that gain of 16 dB. If the blocker is smaller, you could have higher gain. So you could gain up the signal and now your bottleneck in this case, which was the SFDR of the ADC, could be more relaxed because the signal is now at a higher input level into the ADC. So generally linearity requirements and the ADC's SFDR requirement gets more relaxed when you're not in the multi-carrier GSM.

SCOTT KULCHYCKI: And I guess speaking more broadly Tom, since we discussed it on a previous slide, other applications are these point-to-point links. A point-to-point link is actually what you'll often find in corporate buildings or even university buildings to do high sort of bandwidth communication between close distances. In the microwave backhaul, the backhaul is basically the backbone of the communications network and so it finds applications there as well.

TOM FLOYD: Okay.

BOBBY MATINPOUR: And the requirements for those could be slightly different than the multi-carrier GSM.

TOM FLOYD: Okay, great, thanks.

Design Example: Normal Condition

BOBBY MATINPOUR: So we talked about the ADC noise figure of 27.5 dB. We did mention that the low noise figure of the 6517 comes into play and becomes very important here. In the case of overall gain in the normal condition, we want to just basically maximize the gain of the DVGA and get the maximum gain through the whole chain. Now using the ADC noise figure of 27.5 dB with the 3.5 dB margin that we add on top of it, we get about minus150 dBm/Hz, the noise density of the ADC. Now that translates into 75 dB FS SNR at the sample rate that we discussed, the 153.6. So right now ADC16DV160 has 76 dB FS SNR at 192MHz IF and you will not find a lot of ADCs that have very good SNR like this at high-IF. And this especially when it's paired with a clean input reference clock coming from a device like LMK04000, a clock jitter cleaner.

TOM FLOYD: Now why is there a 3.5 dB margin built into your ADC calculation here?

BOBBY MATINPOUR: That's a very good question because every dB, if you talk to the ADC designers, is a big deal. So why we're targeting initially to get with the 27.5 dB ADC noise figure will get you to minus 104 dBm absolute requirement. Now you need to have some margin. Generally people will use more than 3 dB margin to accommodate temperature variation, part-to-part variation, aging and so on. So you don't want to be right at the razor edge because then your part could fail in the field.

SCOTT KULCHYCKI: And for a lot of base station customers at least, one of the ways they differentiate their products from their competitors' products, is how much they exceed the minimum requirement and so margin is very important for a lot of these customers.

TOM FLOYD: Okay, got it.

BOBBY MATINPOUR: Yes, very good point.

Design Summary

SCOTT KULCHYCKI: Okay, so Bobby's gone through a lot of numbers and maybe the analysis isn't necessarily really straightforward. So we should maybe just review where we got to. Now keep in mind, when we're designing these systems, again the metric that we're measuring it on is the sensitivity. And so we want to find out, the system we just built, what is its sensitivity? And if you go through the analysis and simulations, we can see that the system that Bobby just explained can actually resolve in the normal, non-blocking condition a signal as small as minus107.2 dBm. Now the spec is minus104, so we've really got 3 to 3.5 dB of margin. Now under the blocking condition remember that our minimum spec was minus 92. When you go through the simulations in the system that we just discussed, it actually gives you minus 95.5. So again we've built a system with 3 to 4 dB of margin which again is important to our customers. So the thing that we won't be discussing in this webinar -- there's not really time to get into this -- is the IF filtering and the RF filtering. But we just want to point out that the IF filtering, there is an example that's been done here at National and it's going to be reflected in this high-IF receive subsystem that's going to launch later in September. And the subsystem, in addition to having an example of an IF filter, is actually going to feature the products we've talked about today, so the LMH6517, the ADC16DV160 as well as the LMK04000.

TOM FLOYD: Okay.

High IF Receiver Sub-System

SCOTT KULCHYCKI: This is a photo of the board that we'll be launching and the basic idea is that we've put this system together to help people with this non-obvious design process. So the idea is we provide the board and in addition board schematics, layout, other information. And the idea of course is to help our customers accelerate their design from these high-performance, multi-carrier, multi-standard systems.

Call to Action

BOBBY MATINPOUR: And so I want to thank Tom for giving us an opportunity to be here again and thank everybody for tuning in. For additional information please go to National's website. You can find the URLs for all of these great products, ADC16DV160, LMH6517, LMK04000. Data sheet and additional application notes are available. Please do check on the high-IF subsystem board that comes later this month and all the collateral associated with that and we do have a lot of great webinars. Some of the ones that we did on Clock and Timing Webinar are very much targeted for the wireless infrastructure and they're available on the PowerWise Design University. And download and examine the Wireless Communications Brochures. There are a lot of products that National has that target the communication infrastructure.

Contact Information

TOM FLOYD: Great, and as always if folks have any follow-up questions too, they can feel free to contact both of you as well?

SCOTT KULCHYCKI: Oh, of course, absolutely.

BOBBY MATINPOUR: Yes.

TOM FLOYD: Okay, perfect, well thanks to both of you guys for joining us today too. For everybody who joined us live as well, thank you.

Thanks

As always, a few things in closing, just like we usually ask, there is a short multiple choice assessment question test associated with this webinar. If you can take a few minutes to complete that to see what you learned in today's session, that would be great. And as always we're looking for your feedback as well. There's a very short evaluation. If you can also take a few minutes to fill that out, let us know your thoughts, your feedback, it's especially helpful when it comes time to planning future webinars, so we'd appreciate that. And with that said, thanks again and enjoy the rest of your day.

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Subject:	High IF / High Sensitivity Radio Receiver Design