Settling Time Challenges and Improvement Techniques in Precision Signal Path Conversion
Hi, my name is Amy Le and I'm an applications engineer in the High Precision Signal Path Group. Today my presentation will be on settling time challenges and improvement techniques in Precision Signal Path Conversion.
Objectives
Now the title sounds kind of long, but I'm going to attempt to explain what the title really means for my objectives. I'm going to tell you what the settling time challenge is. I'll give you three definitions, Settling Time, Error Band and Acquisition Time and then I'll provide you five technique to overcome this challenge.
Settling Time Challenge
And finally, I'll wrap it up with a conclusion. Let's move on with the first objective,
Settling Time Challenge
Which is to describe the Settling Time Challenge. To understand this challenge let's compare it to a real life scenario, such as going to see a play. Now I recently went to see the musical Wicked in San Francisco and it was a wonderful play. I've had a little observation sitting in the back of the theater. If you've ever been to a play you know how important it is to get there on time, because it doesn't matter what kind of ticket you have, whether you're the President of the United States,
Settling Time Challenge
the door closes exactly on time and if you're late you're pretty much stuck outside, not allowed entrance till intermission time. Now imagine that our SAR ADC is like the theater. Inside the ADC there are switches, just like there are doors in a theater, that allow the input voltage to be connected to the converted circuit. In a SAR ADC scheme there are two sampling modes called the Acquisition and the Conversion mode. Acquisition or the Track mode occurs when Switch 1 and Switch 2 are closed to connect the input voltage to the Sampling Capacitor. This mode is kind of like the time the play starts or during intermission when people are allowed to enter the theater, just as the input voltage is allowed to enter the ADC.
Settling Time Challenge
The second mode is called the Conversion or the Hold mode and this mode's which one connected C Sample to the ground, maintaining that sample voltage and Switch 2 is open to connect C Sample to the converted circuit. This mode is kind of like when the play begins, all the doors are closed and no one is allowed to enter the theater.
Settling Time Challenge
So the point of this illustration, the problem we're going to tackle throughout this presentation is the Settling Time Challenge. How do we make sure the ADC Source, the op-amp or the sensor settles in time so the ADC does not sample erroneous voltage? In other words, how do we make sure you get to the theater in time to see the play. And I know Wicked costs hundreds of dollars so you definitely don't want to miss any of it.
Settling Time, Error Band, & Acquisition Time Definitions
So with that said, let's define certain terms in order to help you understand more about this challenge. Imagine you have an ADC Source. It could be an op-amp or a temperature sensor.
Settling Time
After applying input voltage to the source, an output voltage will come out some time later.
Settling Time
So settling time of input device is defined as the time from the step input to the time at which the device output has entered and remain within specific error band.
Settling Time
So what are we trying to accomplish here, giving you this definition? Remember what we're trying to do? We want you to get to the theater in time. So settling time is comparable to the time it would take to get you to the theater. You need to know do I have to shower before, do I need to pick up my friends before the play, and this diagram will help you understand two important questions before you go to the play. Where is this theater and what time does the play start? First of all, you need to know where the theater is so you can plan your trip. Is it a mile away, is it down two blocks?
Error Band
So the location of this theater is this error band. And in this presentation we're going to define the error band as the output of the source, plus or minus 1/2 LSB. Next you need to know when does the play start, so you find out how much time you have to get ready.
Acquisition (Track) Time
So you need to understand acquisition time. As explained before, the acquisition time is the time in which the ADC will track the input voltage, all the time the theater's doors will remain open. And the settling time is the time in which it will take you to get to the theater.
Acquisition (Track) Time
Simply you need to go to the theater before the door closes, therefore, the settling time has to be less than the acquisition time, otherwise, ADC will sample incorrect or erroneous voltage.
Acquisition (Track) Time
To find what your acquisition time is look in the ADC data sheet electrical characteristic table. For example, for ADC122S101 for the 20mgHz clock I calculate the acquisition time of 150ns. That means whatever is driving the ADC needs to settle before 150ns for the ADC to sample the correct voltage.
Techniques for Overcoming the Settling Time Challenge
So now that you know how long it will get to take you to the theater, where the theater is, what time the play will start, let's give you five techniques to get you to the theater on time.
Technique #1 - Slow Down tACQ
So think about what is causing the Settling Time Challenge. The acquisition time is way too fast or the play starts way too soon and you just don't have enough time to get ready. Let's say you have to run so many errands that day or you woke up late. So what if the play starts at 9 PM rather than 8 PM? Having that extra hour to get to the theater would probably increase your chances of getting there sooner, right?
Technique #1 - Slow Down tACQ
One solution to slow down the acquisition time is to use a slower clock. It's illustrated in the timing diagram.
Technique #1 - Slow Down tACQ
Having a slower clock increases the period and thus slows down the acquisition time. So for example, with a 20mgHz clock of an ADC122S101, the acquisition time is a fast 150ns, as I said before. For example, with a 20mgHz clock for an ADC122S101 the acquisition time is a fast 150ns. But with the 7mgHz clock, the acquisition time is a slower 375ns. But, of course, the obvious disadvantage of this technique is that you're sampling much slower. So let's see the second technique where you don't have to sacrifice sampling rate for a slower acquisition time. Now you want to decrease the acquisition time, but using a different technique.
Technique #2 - ADC w/Back-End tACQ
The second technique is to find that ADC that will allow you to have the acquisition time at the backend instead of the frontend. So what am I talking here with the backend, the frontend business? An example of the acquisition time on the frontend can be found in the ADC122S101's timing diagram where the acquisition time is at the front.
Technique #2 - ADC w/Back-End tACQ
And the acquisition time is in the back as in the ADC141S626.
Technique #2 - ADC w/Back-End tACQ
So we have an example for an ADC161S606 with a backend acquisition. We can analyze this timing diagram and see how it will help overcome our Settling Time Challenge. This ADC enters acquisition time when CSB is de-asserted and it stays in this mode for as long as you can wait for a minimum of 667ns. If you can wait that long you can sample input voltage the next day if you want. You're in control of the acquisition time. Like imagine forgetting the play, renting the DVD and just watching the play at home, you control the show time. The other benefit of this configuration is while in acquisition mode ADC powers down and you're consuming minimum power. So what if you don't want to deal with the acquisition time of the ADC and you want to work on improving the source? Let's look at the third technique.
Technique #3 - Add an RC Filter
The third technique is to add an RC filter. Think about what else is causing the settling time to take so long, or what is taking you so long to get to the theater. Perhaps you want to walk that day, it's a nice day and you want to save the planet, but you just don't have the ability to walk there fast enough. For example, I live in San Jose and the Orpheum Theater that it was playing was in San Francisco. There's no way I would be able to walk fifty miles. And if you don't have the ability, that is a weak source. In this case, our suggestion is to drive a car instead of walking, and that's where adding this RC filter is comparable to, giving yourself a little oomph to increase the settling time.
Technique #3 - Add an RC Filter
Such a circuit is shown where a low power temperature sensor LM94022 is sourcing the ADC with an external resistor and capacitor.
Technique #3 - Add an RC Filter
So let's see how this RC filter can help with the settling time. So in the beginning the sensors isn't connected to anything. Its output voltage will be called Vsource.
Technique #3 - Add an RC Filter
Adding the ADC to its output adds disturbances to the system. Vsource is no longer the same voltage so we'll call it as Vfinal.
Technique #3 - Add an RC Filter
Let's do some RC calculations to understand more about this concept. So here we are back in college with some more equations. You remember the fundamental property of charge, Q = CV and the charge conservation theorem. Using these equations you can solve for Vfinal.
Technique #3 - Add an RC Filter
Next we're going to define that Vdroop as Vsource - Vfinal. Remember I showed you the diagram where Vsource is the output of the sensor without the ADC connection? Then you add the ADC and its final voltage is Vfinal. What your objective is you don't want to have a very large Vdroop. That means you will have a great voltage error if you do. And through two more equations I prove how Vdroop is comparable to the error voltage of the system. Your objective, again, is to keep Vdroop as low as possible.
Technique #3 - Add an RC Filter
With this you can calculate the RC value you need for your system. For example, after five time constants ADC input recovers within 0.67% of Vdroop. After six times constants the ADC input recovers within 0.25% of Vdroop. The point I want you to take away with these equations is if you have an op-amp and you add an ADC to it, the op-amp's output is going to droop, but you're going to try your best to make sure that voltage droop isn't that much by adding this RC filter.
Technique #3 - Add an RC Filter
Our recommendation for the external capacitor is thousand times larger than the sampling capacitor.
Technique #3 - Add an RC Filter
For example if C sample is typically 33pF you can choose an external capacitor of 232nF. Our recommendation for the external resistor whose job is to maintain the op-amp output is a small value of 1.5kOhm.
Technique #3 - Add an RC Filter
So we did some experiments to measure the settling time of the temperature sensor with these values and found the settling time and transient spike are very much negligible. So you can use this calculation I discussed before to find the appropriate RC value for your system.
Technique #4 - Use a Strong Source
So what if you don't want to add that external RC filter to overcome the fact that your source is too weak?
Technique #4 - Use a Strong Source
Well, the fourth technique is to have a strong source, a strong output drive is comparable to being 100% ready to go to the play, that is you plan out your route, you print out the map, you know where the car keys are, you prepare for your outfit. Someone who's 100% ready for any circumstances that might go wrong is kind of like a strong source. Such a strong source is capable of handling any disturbed system. The ADC (inaudible) and is ready to replenish that charge. Some of the characteristics you can look for in a strong source is as follows. There are three points that I listed here, which are pretty much talks about the same thing so I will explain the first point then compare to the second and third points. So first, a strong source should have a strong output drive. In technique number three we talk about that external capacitor, a charged reservoir, having the ability to replenish charge quickly onto the assembling capacitor. And this technique, if you have a strong source, the capacitor's not there, so the source acts like an external capacitor. And it should have a strong enough to be able to replenish charge quickly onto C sample when needed. Remember talking about that Vdroop and how you don't want a big Vdroop? Well this strong output drive should be a able to make Vdroop as small as possible so the time to settle to the final voltage doesn't need to be that long. Having a large output current is comparable to saying that the source should have a small output impedance, as well. And a strong source should be able to have a stiff output. Once again, Vdroop should be small and the output of the source should be able to handle any disturbances at the output.
Technique #4 - Use a Strong Source
How do you know if your source is good enough to drive this particular ADC? You can actually calculate that kind of current, what kind of current you need, using the I = C = dV/dt equation. And we did a little calculation here for the ADC122S101 where we found that the demands are 1.1mA to drive it.
Technique #4 - Use a Strong Source
An example with strong source is the LMP7732 whose source current from the Isource plot taken from the data sheet is around 45mA. With the strong source and external capacitor is not even needed, but an external resistor of about 50Ohm is recommended to maintain the stability of the op-amp.
Technique #5 - Do Dummy Reads
And the fifth and last technique is to do dummy reads. I don't have any example for you but this is actually my favorite technique because it's quick and simple. Sometimes you already design the system and you just don't want to take the time to switch out the components. So this technique will allow you to solve the problem using the software. Doing dummy reads is as follows. First, you read the first couple of samples, you throw them away and you take the final sampling reading.
Technique #5 - Do Dummy Reads
For example, on the first reading the source hasn't settled yet so you know it's bad, throw it away. On the second sample, the source still hasn't settled so you read it but you throw it away.
Technique #5 - Do Dummy Reads
Finally, the source settles. Take this final reading and use it as your voltage.
Technique #5 - Do Dummy Reads
The amount of reads you need can be determined by scoping the output of your source, finding the settling time, then determine how many samples you need in order to get that one good voltage.
Conclusion
So now that I've presented five techniques, let's review what we talked about.
Conclusion
The problem for the signal path conversion is making sure the ADC source, which is the sensor or the op-amp, settles in time so the ADC doesn't read erroneous voltage. Such a problem is comparable to making sure you get to the theater in time to see Wicked, the musical.
Conclusion
We define this settling time as comparable to the time it would take you to go to the theater. The error band is the location of the theater and the acquisition time is comparable to the time when the play will start.
Conclusion
And we presented five techniques to get you to the theater on time. First, slow down the acquisition time by slowing down the clock. This is kind of like finding a show that will start later time. Second, add an ADC with the backend acquisition time so you can control the acquisition time. This is kind of like renting a DVD so you can control the show time and watch later on. Third, add an RC filter to decrease the settling time and stabilize the op-amp's output. This is kind of like instead of walking to the theater perhaps you can drive to the theater. Fourth, use a strong source to be able to replenish the sampling capacitor quickly so you don't have a large Vdroop. This is kind of like being extra prepared to go to the theater so you don't waste your time like finding lost keys, for example. Then lastly, do dummy reads so you can throw away the incorrect voltage and take the correct on later on. National recommends using many of these techniques as much as possible.
Recommendation
Use the backend acquisition time, ADC161S626 and you can use the strong source such as the LMP7732. You can also add external passive components just to be safe. And if you are driving the sensor make sure you buffer it with a strong op-amp. With that I've concluded my presentation.
For Additional Information
For additional information you can read the following articles, which talked a lot about the third technique and how to maximize your performance.
Call to Action
Basically, we've been receiving settling time questions for a long time and here's your call of action. I encourage you to explore new techniques, work out the equations yourself, talk to people who know about these challenges and how to overcome them.
Contact Information
And if you have any questions or comments, please feel free to e-mail me. With that, I hope this discussion will increase your awareness about Signal Path Conversion. My curtain is now closing.
National Semiconductor
Thank you for coming and I hope you enjoy my play.
Digg
Del.icio.us
