PD-Link II Display Solutions for Automotive Applications DS90UR241/DS90UR124
TOM FLOYD: Hello everyone and welcome to today's webinar. I'm Tom Floyd, I'm the moderator for today's session and with me are John Goldie and Alan Tan. Welcome guys. JOHN GOLDIE: Thank you. ALEX TAN: Thanks. TOM FLOYD: Before we jump into our conversation today one quick housekeeping thing to keep in mind as usual, we really want today's session to be interactive. So for those of you who are joining us live feel free to use the good webinar interface to type questions to me directly and I'll make sure to ask those on your behalf. And with that said I think we can get started so guys take us away.
Panelists
TOM FLOYD: Great...first I'd like to thank you very much for joining us today. We've got a very interesting webinar for you. We're going to go directly into a chipset that's getting a lot of excitement and interest.
Objectives
First we're going to talk about what applications we target with the DS90UR241/124 FPD-Link II chipset. We're going to go into the key system benefits. John's going to have a number of slides that go into those details and we're going to talk about the main features of these chipsets and what their value is to an auto infotainment system. And finally we're going to suggest some complementary products that also support this FPD-Link II chipset and expand its functionality.
FPD-Link II Auto Display Applications DS90UR241 SER / DS90UR124 DES
First on this slide what we're talking about in general is just kind of an idea of what this part does. This part is connecting from say a video processor, so a video source, out to a display and as you could see on the bottom there's a number of different places where displays go into cars. For instance in a rear entertainment system like on the left or off of the seat head units that's kind of expanded and also in the central information display which is in the center of the console. John why don't you tell us a little bit about this diagram up here. JOHN GOLDIE: Sure in the block diagram what we see is the basic function of the link. The serializer collects up the wide parallel bus and serializes it down to the single signal differential pair with embedded clock and that runs a great distance over to the deserializer where we recover that data and expand it back out. The basic function is to get us down to that single pair interface, a very small and long cable.
Targeted Applications DS90UR241 SER / DS90UR124 DES
ALEX TAN: Okay so let's talk about some of the applications that this part goes into. It's really mainly used for automotive display so that's like I mentioned the central information display in the center. It's for rear seat entertainment units. It's for the instrumentation display. You'll see it in heads-up displays. It could actually be used to replace mirrors. Believe that or not you could talk about a car that doesn't actually have physical mirrors, instead it has some cameras, no blind spots. TOM FLOYD: Oh cool. ALEX TAN: It'll take some time to get used to that though. TOM FLOYD: I can imagine. ALEX TAN: And then also for cameras, sensors and driver assist applications too. JOHN GOLDIE: The most common display resolution used in these applications is what's known as a wide VGA format. That's an 800 x 480 resolution and it's with 18 bits per pixel or that sometimes also referred to as 6 bit color so 6 bits of red, green and blue. That type of display resolution and frame rate, usually the clock is around the 30 Mhz so that's usually the types of resolutions we find in most car applications today. TOM FLOYD: Now are there any other display resolutions used in automotive applications? JOHN GOLDIE: Yes there are. In instrumentation embedded in the dashboard, those displays tend to be a bit smaller and so you'll have sub-VGA displays in that application. And the trend in rear seat entertainment of course is high definition. Everybody wants to see a cleaner picture so eventually that's going to scale up in the entertainment displays to much higher resolution displays for that fine HD picture quality. That's coming in the future. ALEX TAN: It's like a theater in your car. TOM FLOYD: I know, mobile theater. ALEX TAN: Mobile theater right drive not drive in but drive around, right? TOM FLOYD: A crystal clear mobile theater.
FPD-Link II Chipset Overview
ALEX TAN: Absolutely, so if we look at the chipset itself there's several key features here that we would like to call out. First in terms of the improved signal integrity the signals are programmable, they have pre-emphasis and selectable VoD. The actual signaling over the serialized link has DC-balanced data and has a clock sent over the single differential pair. That's a key difference between this chipset and the prior FPD-Link chipsets is that clock being sent over that pair and also the link can support hot plug and random data lock. And John'll tell you about the other features on this. JOHN GOLDIE: Sure thanks. The chipset also recognizes a big challenge in system design is EMI reduction. What it enables is a variety of different features from the use of LVDS with small signals to these balanced coding to help take out harmonic beats out of the data pattern to compatibility with spread spectrum clocking through the entire link. And then we also focus a lot on the deserializer output because once again we've taken that serial bus and recovered it as a wide parallel bus and that's a noise source. So what we want to do is control the edge rate and also limit how many outputs can switch at one point and that's another way that we help to defeat noise. The chipset in general is a very EMI-friendly or EMI minimizer type features and that's very popular with our customers. In addition to the standard use features we have a built in self test. And this is something we'll go into a little more detail later but it's very handy not only in the prototype stage but in the application and also in a diagnostics or servicing phase and we'll speak more on that shortly. ALEX TAN: Yes those are key features and we'll go into a lot of detail. TOM FLOYD: Okay great.
Why?
ALEX TAN: One question you might ask is why. Why automotive displays? What are we doing? Why are we developing these devices? These displays, we like to think of these are improving the safety, the quality of life of the drivers. They're also great for entertainment and also efficiency in the system. Now that's just in terms of the general target but then what about serial? Why are we doing serial instead of say the parallel bus that you were talking about before? A serial connection gives us less cabling which is very important for auto infotainment applications. It also give us lower cost, less pins, less weight and that means smaller holes in the frame and higher gas mileage which if you've been paying any attention at all to the auto industry is really key and is going to be even more important in the future. So for LVDS signaling... JOHN GOLDIE: Sure, LVDS was chosen that with the smaller swing we can save power, we can go very fast and not generate too much EMI. It also has the drive capability to drive these long lengths and it's been greatly endorsed throughout the industry in many different marketplaces so it's kind of the de facto standard. It's the perfect solution to the physical layer for this long cable. The other question is, why National, and National has a proud heritage in the display interface. We're also the inventors of LVDS and with our high quality and volume manufacturing and full AEC qual devices we're a great fit for the automotive marketplace. TOM FLOYD: Now you have the AEC-Q100 standard listed here on the slide. Why is that important? ALEX TAN: Well AEC-Q100 is really key for any automotive application. It is a standard definition that really sets the limits on what's required for these parts so that they can operate effectively and robustly in an automotive system. The other thing that I think we should point out here is actually National has been delivering parts for the automotive market for over 30 years so we've got a long history there. TOM FLOYD: Okay, great.
Display Interface & Systems
We just had a question that came in as well and the question is, since the serialized signal is AC coupled can we deliver power over the same pair of wires that carry the data. JOHN GOLDIE: Yes that's actually possible. Since the AC coupling is done at both ends of the system, at the serializer side and at the deserializer side, it's possible to connect in power, send it across the pair and bring it out. And we'll actually touch on that a little bit when we get to the future where this chipset is evolving. TOM FLOYD: Okay, great. ALEX TAN: What we talk about here is a little bit about what's actually the history from the display standpoint. In 1995 National Semiconductor invented the LVDS and FPD-Link and what really drove that development was a development for a laptop. The FPD-Link is a way of taking the video from the GPO in the laptop and providing it to the flat panel in the top of the laptop. So even now today all of the laptop systems use or integrate a version of FPD-Link in them. Now since then there's been a number of developments we've had in terms of additional developments for the video standards going through first FPD-Links specifically for the laptop then also the RSDS, PPDS. These are all different improvements on the FPD-Link approach to delivering the video. And then finally in 2006 we came out with the FPD-Link II which was really specifically targeted for these automotive applications that we're talking about here. And since then we also have the mobile pixel link that's in the different phone displays as well. JOHN GOLDIE: What I find really compelling about this foil is just the history of innovation that National's brought to the display. We helped enable the XGA transition to XGA displays in Notebooks. With PPDS we really address low power in the large HDTVs and with MPL we focused a lot on low EMI and low power for smartphones. And a lot of those learnings from over these decades have been brought together and the FPD-Link II chipset really benefits from all of those different innovations that we've done throughout the years.
Auto Infotainment Application Diagram
ALEX TAN: Absolutely, so let's take a look now at kind of an example application. This is a example of an audio infotainment system that would go into a car. It's starting from the left hand side is kind of your auto infotainment system with a TV and a DVD player driving the host. Maybe other video sources could be from a camera or from the nav. And that would go into a link and that link is the interconnect to the target side and the target side would typically be a display, so that would be a TFT or LCD display panel that's in the car. If you want to talk a little bit about where you would actually see these interconnects in the system. JOHN GOLDIE: Sure, specifically on the cables a common question we always get is, what's the length of the cable. It's the famous interface question, how far, how fast. Addressing this how far. In the CID applications the host and the target are probably located through the routing of the cable. They may be physically closer but you have to think about where the cable routes. It's typically one to three meters in length. Now for rear seat entertainment you have a much longer routing path and in that case we typically see seven to ten meter lengths. TOM FLOYD: Wow that's a big difference. JOHN GOLDIE: And that's quite a big difference and that's really as we get into the signal conditioning features that's what enables those long lengths for this rear seat entertainment. We also commonly find multiple connectors. Depending upon how the car is built and what sub-assemblies you may put a hunk of cable in assembly A and then finish that, park it, store it, and then work on another assembly. And eventually as you assemble the whole car together then you have to assemble the two pieces together. So it's common on our interconnects to see multiple sets of connectors along the way as the different pieces have fit together.
Key Features to Note
ALEX TAN: Some key features to note for the FPD-Link II. First, and this is kind of the basis of the product is that it's SERDES and LVDS. This enables that single pair link that's really important for auto infotainment systems. The other thing is it's a 24 bit payload so 18 bit color support. You get very good displays both for say from video sources and also cameras and other things like that. And as John just mentioned in terms of signal conditioning it has signal conditioning integrated into the system to allow you to get that ten meters. And I know that like John had said it seems like a long distance but if you think about it if you've got say your DVD player in the trunk of your car and it needs to run all the way up to the front and then --. So it's going to be coming out like up a deep pillar, across something, down different pillars. They have to run it all around and squirrely through the car to get up to the front. Also we have a whole host of EMI minimization features. JOHN GOLDIE: Sure, we have as mentioned the randomization, balancing and scrambling. Its elaborate protocol that we do on the data pattern traveling across the cable to help reduce harmonic beats and also spread out any kind of EMI beats so that's very advantageous. In addition to that coding it also allows as mentioned earlier by the question that came in AC coupling at both ends, that's also good for fault tolerance. And the reason that is is in a car they're concerned, if you short the cable out in the middle it's a safety reason, you don't want any DC current to flow. So having AC caps at both ends of the bus prevents the flow of DC current so it's a safety type environment. And as also discussed the deserializer outputs feature both slew rate control so instead of too sharp of an edge it has a nice rounded edge. And we also have circuitry in there to reduce the number of outputs that can switch at one time. That helps prevent noise. Besides EMI there's more (inaudible) features. The architecture that we've used doesn't require a reference clock so the deserializer, the recovery of the data, is done entirely on the inbound stream. You don't need a helper clock come in and decide to say, oh look at this signal and now you can recover your signal. We don't require any of that cost or board space or expense. We just basically look at the inbound signals and are able to do our clock and data recovery off that. Customers really like that simplicity and cost savings. The BIST mode allows this factory test and diagnostics and we've mentioned the AEC qual is also a really key feature to note to our customers.
LVDS PHY Layer
LVDS is the way we get the signals across the cables. And basically why LVDS? Well to get the high speed we can't have a big swing. We want to use a small swing so that's advantageous both from power and from an edge rate and from a high speed. Another benefit of it is with the small swing it only requires a few milliamps drive current. And so with a few milliamps drive current that tends to be quieter than switching say 48 milliamps. It's much more friendly to switching back and forth three milliamps. Differential's also what they call odd mode. Well what is odd mode? Odd mode is in one side of the pair currents flowing one direction and on the other side of the pair it's flowing the opposite. So the odd mode currents, when they're equal and balanced, they tie up and cancel each other and they're very quiet or low noise intrinsically so that's a really big advantage. A lot of people get scared about the small swing. If I have a small swing I don't have a lot of noise margin, but that's actually the benefit of LVDS. Again is the D, it's the differential. Noise gets coupled common and the whole bus rides up and down. We actually have a noise margin which is greater than our signal swing so this is much superior than signal ended signals so it's a perfect fit for the automotive environment. It's basically proven, reliable and extremely robust. ALEX TAN: Excellent. TOM FLOYD: Now what's the main point you're trying to illustrate on the graphic here? JOHN GOLDIE: What's really nice about the graphic is that's showing our full serial payload. And you can see the embedded clock bits, that's the fixed edges and then we have our data bits. What you want to see is nice even data bits for good data recover and a nice wide opening. You also want to see a little smoothness in the eye pattern as that's an attribute of signal integrity or signal quality. So we're looking at eye height, eye width and opening. TOM FLOYD: Okay got you.
FPD-Link II Payload
We just had a question that came in too and the question is, can this device handle both video and audio transport. ALEX TAN: Well yes actually that's a very good question. It does handle both and we've got a slide that talks specifically about how we handle both video and audio on this and that'll be coming up soon. TOM FLOYD: Okay perfect. JOHN GOLDIE: And actually we're going to introduce the concept on this foil. This is looking at those 28 bits. You can basically see out of 28 bits sent per parallel clock what are they used for? Well 24 are really what we would call true data bits. There's four additional bits. What are those four additional bits? Two are assigned to the clock. You have the C0 and the C1 edge. You can graphically see those as the fixed edge at the outsides of the payload as shown here. Then we also have two bits, what are called DCA and DCB. They're basically our serial overhead. They're the key that's sent from the serializer to the deserializer so we can understand what's going on on the link. Is it BIST mode, is it normal data or how to decode the data. The other bits what are really the workhorse bits; these are the 24 data bits. So now we break up, what does a customer use these 24 bits for? Well the first, you know the easy answer is, the video pixel data, so there's our 18 bits or RGB so we've now used up 18 out of 24. With the display there's also three common control bits, vertical synch, horizontal synch and sometimes they use a third one called data enable. So now we're climbing up to 21 so I got 3 bits left. What can I do with those? Well customers find those very exciting because they can use them for special features in their system or GPIOs to do turn on and off some special control functions or in some cases they'll use it for audio going back to our question. And I2S is a common audio standard that can actually send in digital format the audio signal across the link. And guess what, it requires three signals so it's a perfect fit to put the video and the audio together and send it in unison across the pair. Last thing what we'd like to look at is think about is efficiency. Lot of people heard about 8B/10B, it's kind of an industry standard out there but for every 8 bits of data you send it takes 10 bits. So we could say, how efficient is that? Well it's 80%. If you look at our scheme we give you 24 bits for 28 sent and that's 85%, so with efficiency of course the higher the number the better so we're a very efficient transmission.
Oversample I2S for Audio transport
ALEX TAN: Now this slide talks about that audio application exactly. So in this case what we're looking at here is those extra bits that John mentioned are being used for the I2S function. And the block on the lower left is an I2S audio controller and it's inputting into the DS90UR241. Then the audio is being sent over the FPD-Link II to the DS90UR124 and then out through these additional pins to say an LM4931deck or some other audio deck so that you can have speakers in your system. One thing that a lot of people might ask is, well in a audio infotainment system like this why would you need speakers? Why do you need to have audio out to say your rear seat? And actually when you think about it it becomes pretty clear. A lot of these high end systems actually allows you to have multiple videos. Somebody could be watching football, the other person could be watching Sponge Bob or something, some cartoon show, and somebody in the front might be watching a television if you've got a really nice system. In that case everybody's going to have different audio and one really good solution is to give everybody a headset that they can plug right into their system so they can hear it instead of trying to specialize audio in the car for the whole cabin. TOM FLOYD: That's literally what my car has so --. ALEX TAN: Is that right? So you know what I'm talking about. TOM FLOYD: Yes it's got the wireless headphones in the back of each one (inaudible), so interesting. ALEX TAN: Exactly.
Why Signal Conditioning?
JOHN GOLDIE: Let's jump a little bit into the signal conditioning. What we're really curious about is how do we get that signal from the serializer to the deserializer over multiple connectors in 10 meters in lengths. So we bring up this concept of inter symbol interference. In the interface world that's commonly called ISI and it deals with cable loss. To set it off we can think about what is a single ended signal, it's a tongue twister. And basically it's one signal would transition from a VOL to a VOH. And let's say it's LVCMOS 1.8 volts, that's a big signal swing. And the problem with that is if we wanted to do that really fast it consumes too much power and the DVDT generates too much noise. How do we solve that? We go with LVDS. Being a differential signal it's smaller in magnitude. It enables us to go faster edge rates at lower noise levels. It gives us that common mode rejection so it's all great. It's great for power. It's great for noise. It's great for speed. We're addressing everything so what's the problem? Well the problem as we'll see is as we send different data patterns as shown here on the red you have a 1.0 transition and then a big stream of one's or zero's. The poor bit that follows that static one is going to get distorted so if we more or less overlay these together they build into what's known as the eye pattern. And you can see as that eye decreases you get the effect of ISI and that's really the real world problem of what the cable is. The other thing I'd like to always have everybody remember is what is a cable and basically a cable's a low pass filter. If I'm trying to send high speed data down it through a low pass filter I'm going to get distortion out and what do I really do about it. TOM FLOYD: I just want to make sure that I'm getting this. Is the main point to take from this slide then is that even though LVDS has been used, loss is still a great concern, but the best way to handle that is through signal conditioning? JOHN GOLDIE: Exactly. So what type of signal conditioning do we do?
Pre-Emphasis Signal Conditioning
And this concept what we've used on this chipset it's actually two modes. One is we allow you to adjust the VoD signal, the starting point, and the other is we add the more important one is this pre-emphasis. And what pre-emphasis does I like you to focus on is when the logic changes state you drive it an extra amount then if you transition again you would drive again full amount. But if you're going to stay at this level, the same state, what you do is you just back off your signal swing and that has two benefits. One is it saves a little bit of power which in this day and age is always a great thing to do but when the transition does come along it helps cut down our amount of jitter and it helps to open up the eye pattern. The example we show on the foil shows a 010001 transition and you can see both the signal ended waveforms up on the top that compose the differential signal. And the differential signal, so you see this bouncing around wave shape, now that would be over at the source. At the far end of the cable we get the filtered effect so you put in that signal into my cable and what comes out is the eye pattern. If I look at the top eye pattern what I see is it's still pretty good but that white space in the middle is starting to get a little compressed. The margins are getting a little bit tight. So by turning on pre-emphasis what happens here is the signal amplitude margin improves and the jitter reduces so improved signal integrity. Again it's all about getting those data bits recovered correctly.
1-bit Pre-Emphasis Driver (cont.)
Those two eye patterns because they showed the full 28 bits it's a little bit hard to see what's going on. Let's look more microscope at a single bit or a couple of bits together. And in these two waveforms we compare pre-emphasis off so I basically show a 0110 pattern, looks like a nice square wave. Remember that's going into the cable, not after the cable's low pass filtering effects. If we turn on pre-emphasis and I've turned it on pretty strong here, it's 6K resistor value, what you see is the transition from the zero to the one, you get that boost, you get that extra piece. Then because the logic states stayed the same, I've two one's in a row. I back if off, save my power and then I'm setting up for the next transition to have improved signal integrity or less jitter. This is really conceptually how we use pre-emphasis to counteract those bad effects, the low pass filtering of the cable. ALEX TAN: Even though it looks like a worse signal on the right the reality is that's compensating for all the effects of the cable. JOHN GOLDIE: Exactly. Right now we're showing you at the transmitter end and when we probe the eye over at the receiver end on the prior foil you saw the eye patterns were nice and balanced and didn't have this step up and down. It's providing the emphasis to counteract the negative effects of the cable. TOM FLOYD: The advantage of the pre-emphasis driver is it gives you better signal quality and it allows you to get to longer lengths? JOHN GOLDIE: Exactly, exactly. TOM FLOYD: We had a question that came in as well and the question is, so the 241 has half bit pre-emphasis by the looks of it on the current slide. JOHN GOLDIE: It's actually one bit pre-emphasis because in the foil there you have to take note the data pattern we're driving is a 0110 so it's two one's together. So the first part would be the full 1 bit pre-emphasis and the second part which they're probably thinking about is half the bit. It's actually the next full bit, so that's showing two bits in a row with a pattern so the pre-emphasis is full one bit. TOM FLOYD: Okay got it, thanks.
DC Balancing (Sending many 1s or 0s)
JOHN GOLDIE: In addition to the pre-emphasis we talked a little bit about this encoding, this randomization balancing and scrambling so let's look at each of those next. What's the problem with balancing? Well balancing, the problem that occurs is let's think about our display, the backdrop or the color that I'm displaying in a typical Notebook application. You might have a lot of white in the background or in automotive applications they like to have a lot of dark backgrounds. The key there is it's the same color and so we could have a fixed data pattern or many zero's or many one's in a row. And there's this concept of continuous -- the current word, disparity and a running word disparity. Let's say I'm sending, let's use a hex example, a bunch of Fs together, so a bunch of one's. For each hex bit you would say, the current word disparity would be +4, four one's. We're just counting the number of one's so if I run a FFFF the current word disparity is four for each F, but if you add those together you would get to 16. And the problem is over time the charge on the cable keeps climbing. Now when I have that transition I want to go the opposite direction it takes me longer to get down because I've started higher. That's the problem. ALEX TAN: Is that what you're showing there? JOHN GOLDIE: Exactly on the top half of the screen. You see the blue line climbing and you see the red line with the problem of the single zero following many one's. What we can do instead is hey why don't we DC-balance the data, let's not prevent that disparity from climbing. So on the bottom one if I run a cycle of one's and then run say, you know what I'm inverting my data. My four one's became four zero's, I'm balancing out the charge on the cable. So it looks like a square wave on the pattern but what it does is it constraints that running word disparity within a finite number. Instead of being infinity to minus infinity which is huge to infinity and beyond... TOM FLOYD: That's kind of big. JOHN GOLDIE: Yes that's kind of big, it constraints it to this well known number. Now my signal swings go all the way so this is a great thing. And by balancing the data I'm now compatible with AC coupling capacitors and it gives me that fault tolerance that people wanted or it would enable me to couple DC power across the bus if I so choose such as the earlier questions. We do this with all of low overhead. And when we only use those two control bits they're basically telling the deserializer, is the data inverted or not inverted, to keep this constraint within reasonable limits. That's balancing. Now we still have randomizing and scrambling to talk about. TOM FLOYD: Let me interrupt you for one second. We have another question that came in and the question is, do you use both pre-emphasis and encoding or DC-balancing as mentioned here. JOHN GOLDIE: It's a very good question. It's the famous applications response of it depends. I would say the randomizing, balancing and scrambling is used all the time. It's inherently on in the chipset. There's of course a couple of exception cases where you can turn off some of it which we'll address later but you would use that in both applications, a CID and an RSE. In a CID application only running a 1-3 meter cable the need for pre-emphasis probably isn't there. And to save power you could disable it and turn it off and configure the chipset not to use it. However if it's an RSE application where you have to go great distances then we want to turn on the pre-emphasis to get that good signal quality 10 meters away so it depends. If it's a long cable I would say yes, both. If it's a short cable probably just the protocol scrambling is good enough. Great question.
Randomize - Balance - Scramble
The randomizing, basically what that does, it goes back to the data patterns. Again a solid pattern display of a single color might have low transitions or it might have a particular harmonic beat or pathological pattern in the data. So by basically oaring it with a PRBS pattern we're scrambling up the data. We're ensuring transitions and we're smoothing out noise and emissions so that's what our randomization is doing. Scrambling is another level on top of that. What that does instead, remember our prior bit pattern where we showed the red bits, the green bits and the blue bits nicely in the (inaudible). Really what those guys are doing is they're moving all around in the payload and being scrambled. Why? Again it removes beats, less EMI, and it helps improve our signal integrity. ALEX TAN: Really the randomized balance and scramble, it's like our battle cry for how we attack EMI. How do we reduce EMI? Whenever we can we balance it, we randomize it and we scramble it. And by instituting a number of features that provide these effects we provide a really solid and very high level EMI solution for auto infotainment systems. TOM FLOYD: We had another question that came in and I think this was from the previous slide and the question is, can you just clarify the acronyms that were used, CID and RFC. JOHN GOLDIE: RSE. ALEX TAN: Okay so the CID is the central information display. That's the display that's in the front of the car so for instance with your nav unit off and it will display there. RSE means rear seat entertainment. And it really is talking about a system where you have say the panel sitting off of the back of the seats so those are both different auto infotainment applications. TOM FLOYD: Yes great. JOHN GOLDIE: Another variant of the RSE is in some cars they've used a very large panel that actually folds down from the roof and you can almost have the theater viewing. ALEX TAN: Yes like in say --. JOHN GOLDIE: Maybe that's SUV class. ALEX TAN: SUV and the minivans. Not surprisingly that's mainly in the United States but absolutely. JOHN GOLDIE: Sometimes the acronyms change from continent to continent but the application is the same. TOM FLOYD: Okay got it. JOHN GOLDIE: Good.
EMI Minimizer Features
ALEX TAN: Okay so we talked about randomized, balance and scramble as being our battle cry for EMI, but let's talk in more detail on some of these actual EMI minimization features. Like we'd mentioned earlier LVDS I/O current mode and low swing, that's a very important to get us at the right starting point. RBS, randomize, balance and scramble to reduce the pathological patterns. And then we have the PTO feature and we're going to talk in more detail on that so I'll let you introduce it. JOHN GOLDIE: Sure, the PTO or progressive turn on, it helps reduce or limit the number of S --. We like to use three letter acronyms here, SSO, and that's simultaneous switching outputs. So we want to limit how many guys can switch at one time because that really bangs the noise on the supply rail. By saying, you seven go here, you seven go here, we basically spread them out in time and minimize the noise in the system. ALEX TAN: And now you're talking about that interface, right? JOHN GOLDIE: On the deserializer output between the deserializer output and the TCON. The other thing that wide bus we have is the slew rate control and that's what this picture shows on this foil and basically we're looking at the edge rate of the signal. If you have a very sharp edge rate an instantaneous change, that's a fast DVDT. And it will generate noise so we have purposely slowed and rounded to remove some of that high frequency noise content. So we have setting A, that 4 mA drive and even rounder at 2 mA. So once again we give the customer the application, the option depending upon their data rate. Do they need to go as fast as possible or should they reduce the drive current to reduce some noise. That's a feature in the deserializer output again to reduce or minimize EMI as much as possible. Also worthy to mention is some systems so way over at the clock source, they like to spread the clock, purposely move it around to spread out the EMI. Instead of having one strong beat the idea here it's better to have lower beats spread out at a lower noise level. In our chipset within certain guidelines is compatible with this SSC clocking. And what I mean by certain guidelines is the carrier frequency; the clock deviation needs to be under 50 Khz and a few percentage of deviation. We'll pass that along and gain those EMI benefits in the deserializer block, across the cable and through the deserializer block.
DES Dynamically Staggered Parallel Outputs with Spread Spectrum Clocking
This PTO feature, lot of customers have some questions about what is it and how do you explain it and that's a good foil to jump into next. We basically have two options. What they call fixed PTO is basically the clock is normal and stable but we've split these 24 outputs into various banks. And we say, bank 1 switches at this point in time, bank 2 at this point in time and bank 3 at this point. ALEX TAN: We're limiting the draw then? JOHN GOLDIE: We're limiting the number of outputs yes that can switch at one time so that's one level of EMI reduction that we can provide. The new feature that this chat brings on is what they call frequency spread PTO and that's really a little more dynamic. Instead of just saying, you seven go here, you seven go here and the rest of you go here. Basically what this one is allowing is it's dynamically moving them around so we have this spreading effect. And we also do that to the clock to remove that clock beat. Again this is all going after EMI so customers really like these capabilities to help reduce this noise source, control the edge rate, limit the number of switching. This is really how it goes after generating less noise and actually cleans up the quality on the power supply because we're not all switching at one time. TOM FLOYD: Now how does this affect the transmission speed? JOHN GOLDIE: This doesn't actually affect the transmission speed too much because it's back in the parallel domain where you have the full clock bit. It does eat up a little bit of the setup and hold times because instead of everybody switching here and my strobe is in the middle I have this much margin, now basically I'm saying, I'm using this. However even at the data rate's we support the setup and hold our data valid time on either side of the clock is still wide enough to talk with the variety of timing controllers and ASICs out there. So it's a nice tradeoff of trading away a little bit of data valid time for that EMI reduction.
Built In Self Test (BIST) MODE
ALEX TAN: Another key feature of this chipset is the built in self test mode and this is really something that we've put in to enhance a number of different operations for the system. First it can be used in factory test as functional and EMI cable testing. It provides the necessary mechanisms so that we can do these tests in the factory. Second it can be used in the system for startup for doing a link check and also it can be used in diagnostics as a problem locator and as a overall system check to make sure that the system is working correctly. What it does actually is it verifies the link and it reports the results. It provides a PASS if the link is valid and that is outputted on a pin on the deserializer. And then it also advises that the error rate is less than 1x10 to the -9 and it can actually count the errors on a data bus. So this is a really interesting feature that we have had a lot of customer interest in. TOM FLOYD: So the BIST mode's a way to check the integrity of the link basically? JOHN GOLDIE: Yes. TOM FLOYD: Question we just had that came as well and may have been related to the previous slide but the question is, can we support bi-direction communications over one pair of wires. It's usually much slower for communication back for control. JOHN GOLDIE: This chipset focuses on the video path, the UR. So it takes that wide bus and serializes it and sends it out the other side and assumes that in most architectures today the control bus is a separate thing running beside or independent. In a couple of foils we'll get to the roadmap and we do envision that type of evolution on the bus to occur and we'll discuss that on the roadmap. This chipset does not support that features but chipsets will soon. TOM FLOYD: Fantastic.
Schematic View (See Datasheet)
JOHN GOLDIE: I just tossed this one in here. It's a good reference and the graphic is very compelling and detailed and it's in the datasheet so it's left for your reference. And really what's nice to point out to this one is the chipset has a lot of features and a lot of configurability what makes it optimized. But these two graphics tell the customer 80% of the time what's the most common configuration. How do you setup the chip, what would you start with and then perhaps modify it into your specifics. This is included for our customers use and for your study and it's directly out of the datasheet.
System Benefits
ALEX TAN: Let's talk about some of the system benefits of this chipset. First in addition to what we talked about before this chipset offers a sleep mode so it can power down either the serializer or deserializer to save power. We've got a signal conditioning, the VoD select and the pre-emphasis and then these advanced signal conditioning techniques allow you to extend the reach of the system. Also the TRFB and RRFB pins, they provide compatibility with a wide range of hosts and targets. And the RA OFF in C mode, I'm sorry, RA OFF allows us to be compatible with the earlier chipsets, the DS90C241 and 124. That's our C mode excuse me on these devices. Finally we've got an RX LOCK pin which provides the link status and a random lock. Like we mentioned before no reference clock is needed, we could save costs by eliminating that expensive reference clock. TOM FLOYD: So you have compatibility listed on the slide. Can you tell us a little bit more about how the chipset provides compatibility? JOHN GOLDIE: Sure, on that one we're addressing it two different ways. One is with the TRFB and the RRFB, funny four letter acronyms this time. They allow the user to select which is the working edge on the serializer input. So depending on your graphic source if it's coming from a GUI chip or an FPGA or TCON depending on how that's designed you can pick either rising or falling. Same is true on the display side or on the deserializer output depending on my ASIC or TCON I can pick it. By having those flexibility in a chipset we can work with a wide range of hosts and target devices. And then as Alex had mentioned this RA OFF function, it basically changes the balancing, randomizing and scrambling. It turns off the randomizer and makes it compatible with the first generation of the chipset, the C parts. So if you're building new hardware and you like it to be interoperable with existing hardware, it's already deployed, or a variety of sources this chipset is extremely flexible in allowing compatibility with prior generation and various hosts and target devices.
Slide 24
The FPD-Link II chipset delivers many strong system benefits.
It takes the wide parallel video bus and serializes it to a single pair with an embedded clock. This lowers cost, solves skew issues, reduces noise, and extends the link to great distances. The chipset is optimized for WVGA displays and 18-bit color depth. The EMI minimization features help to aid system design and minimize expensive shielding requirements while not sacrificing robustness. The BIST mode benefits factory test, in-application use, and also test and diagnostics for trouble shooting.
FPD-Link II is proven, reliable and very robust! In addition, the family has a roadmap to support higher color depths, higher resolutions, and even more improvements on signal quality and the utilization of the single pair interconnect!
Slide 25
Please visit the National website for additional support material.
Four FPD-Link II application notes are currently available along with a system evaluation kit that provides a SER board, a DES board and a sample interconnect (USB cable). The BIST mode can easily be used to check out the link operation.
Slide 26
DS90C241/124 is the first generation FPD-Link II chipset. The DS90UR241/124 devices are backward compatible with it by the use of the RAOFF function.
The DS99R421 is an alternative to the DS90UR241 SER. If your graphic host features an FPD-Link (I) output, this is the device to serialize down that interface to a single pair to solve skew and distance problems.
Slide 27
National offers a wide variety of automotive solutions, including:
- Safety
- Powertrain
- LED Lighting
- Interface
- Infotainment
Please visit http://www.national.com/analog/automotive for more information.
AECQ Information: http://www.national.com/analog/automotive/aecq
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