SCANSTA111 - Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port

SCANSTA111

Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port

Overview

Diagrams

Parametrics

Documents

Order

Boards

Packaging

Tools

Reliability

Features

• True IEEE 1149.1 hierarchical and multidrop addressable capability

• The 7 slot inputs support up to 121 unique addresses, an Interrogation Address, Broadcast Address, and 4 Multi-cast Group Addresses (address 000000 is reserved)

• 3 IEEE 1149.1-compatible configurable local scan ports

• Mode Register₀ allows local TAPs to be bypassed, selected for insertion into the scan chain individually, or serially in groups of two or three

• Transparent Mode can be enabled with a single instruction to conveniently buffer the backplane IEEE 1149.1 pins to those on a single local scan port

• LSP ACTIVE outputs provide local port enable signals for analog busses supporting IEEE 1149.4.

• General purpose local port passthrough bits are useful for delivering write pulses for FPGA programming or monitoring device status.

• Known Power-up state

• TRST# on all local scan ports

• 32-bit TCK counter

• 16-bit LFSR Signature Compactor

• Local TAPs can become TRI-STATE via the OE# input to allow an alternate test master to take control of the local TAPs (LSP_0-2 have a TRI-STATE notification output)

• 3.0-3.6V V_CC Supply Operation

• Power-off high impedance inputs and outputs

• Supports live insertion/withdrawal

Description
The SCANSTA111 extends the IEEE Std. 1149.1 test bus into a multidrop test bus environment. The advantage of a multidrop approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules. Each SCANSTA111 supports up to 3 local IEEE1149.1 scan rings which can be accessed individually or combined serially. Addressing is accomplished by loading the instruction register with a value matching that of the Slot inputs. Backplane and inter-board testing can easily be accomplished by parking the local TAP Controllers in one of the stable TAP Controller states via a Park instruction. The 32-bit TCK counter enables built in self test operations to be performed on one port while other scan chains are simultaneously tested.

MY BRIEFCASE

Click any "Briefcase" icon to add an item

Block Diagram *click for larger image

Parameters Values

Temperature Min -40 deg C

Temperature Max 85 deg C

Datasheets
Title Size Date Other
Language

SCANSTA111 Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port 917
Kbytes 20-Oct-05

Featured Application Notes
Title Size Date Other
Language

AN-1312: Application Note 1312 Scan Bridge (STA111/STA112) Timing 41
Kbytes 7-Jun-04 中文

AN-1340: Application Note 1340 Simplified Programming of Xilinx Devices Using a SCANSTA111/112 JTAG Scan Chain Mux 179
Kbytes 17-Dec-09 中文

AN-1327: Application Note 1327 Simplified Programming of Altera FPGAs Using a SCANSTA111/112 JTAG Scan Chain Mux 180
Kbytes 17-Dec-09

AN-1259: Application Note 1259 SCANSTA112 Designer`s Reference 687
Kbytes 5-Jan-10 中文

Part Number(s)
(NSID)

Top View

Availability

Current Reported Stock

Budgetary Pricing

Standard Pack Size

SCANSTA111MT/NOPB
SCANSTA111MT

RoHS Status

TSSOP

Full production
Lead Time: 14 weeks

Distributor	Region	Qty
ARROW	Worldwide	63
DIGIKEY	Worldwide	31
NEWARK	Americas	97

$4.30 each at 1K+ pcs

rail
of
38

SCANSTA111MTX/NOPB
SCANSTA111MTX

RoHS Status

TSSOP

Full production
Lead Time: 14 weeks

Distributor	Region	Qty
ARROW	Worldwide	2000
AVNET-EM	Worldwide	1000
DIGIKEY	Worldwide	0

$4.30 each at 1K+ pcs

reel
of
1000

SCANSTA111SM/NOPB
SCANSTA111SM

RoHS Status

FBGA

Full production
Lead Time: 6 weeks

Distributor	Region	Qty
ARROW	Worldwide	782
AVNET-EM	Worldwide	209
DIGIKEY	Worldwide	594

$4.55 each at 1K+ pcs

tray
of
416

SCANSTA111SMX/NOPB
SCANSTA111SMX

RoHS Status

FBGA

Full production
Lead Time: 12 weeks

Distributor		Region	Qty
DIGIKEY		Worldwide	0

$4.55 each at 1K+ pcs

reel
of
2000

All information pertaining to the RoHS Compliance Standard can be found at http://www.national.com/packaging/leadfree.

A RoHS compliance or an IPC 1752 report can be acquired at http://www.national.com/quality/green.

National's certificate of product compliance is located at RoHS Status.

Part Number(s)
(NSID)

Description

Availability

Current Reported Stock

Budgetary Pricing

Standard Pack Size

SCANSTAEVK

Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port

Preliminary
Lead Free (RoHS)

Contact your distributor

$950.00 each

SCANSTAEVK Evaluation Kit, demonstrates features of our SCANSTA111 and SCAN LVDS SerDes devices

The System Test Access (STA) Evaluation Kit provides a scaled-down representation of a typical multi-drop system for the purpose of
showing multi-drop and embedded JTAG testing, diagnostics and FPGA configuration. The kit is composed of a backplane with 3 slots
and several daughtercards to simulate various implementations of test architectures. The modular design allows simple demonstrations,
yet is expandable for use as a development kit where complex implementations of test architectures and new products can be evaluated.

The STA Evaluation Kit is intended to be generic and compatible with Industry standards and 3rd party software and hardware. Pre-
generated SVF files are provided for three example configurations, however, Netlists and schematics are also included if the user would
prefer to generate their own test vector files for their own hardware.

The STA Evaluation Kit supports the IEEE 1149.1 Standard for Boundary Scan Test as the back plane test bus. Analog test busses are
provided to support the IEEE 1149.4 Mixed-Signal test standard. The IEEE1532 Standard for In-System Programmability (ISP), which
utilizes 1149.1 for communication and control, is also supported.

Each Kit consists of the following components:

End User License agreement
Registration Instructions for file downloads and future support
One Backplane
Two SCANSTA111 Multi-drop Daughtercard(s)
Two SerDes Daughtercards (demonstrating SCAN921023/1224)
One Pass Through Card
One Universal Power Supply
Two Cat5 Patch Cords

It's also important to note what is not included in this kit as the following items are additional tools you will need in
order to drive the Evaluation Kit:

Test vector generation tools. We do provide SVF vector sets for three specific configurations of the kit hardware, but
we do not provide the tools to generate additional tests.
Test vector deliver tools and hardware. The kit expects the IEEE 1149.1 test signals at the backplane connector, and
we do not provide a way to drive the vectors from a processer source. You will need additional hardware that
interfaces to a PC (or other source) and converts the data stream to 1149.1.
Diagnostic software for interpreting the test results. Typically the ATPG tool package includes some form of diagnostic
capability.

The vector generation, vector delivery, and diagnostics tools and hardware are available from our third party ATPG partners listed here.

Part Number(s) (NSID)	Type	Pins	MSL Rating	Peak Reflow	RoHS Status	CAD Symbols	Models	Package Marking Format
SCANSTA111MT/NOPB SCANSTA111MT	TSSOP	48	2 2	260 235	Detail	Download	sta111mt.ibs	NSUZXYTTE# SCANSTA111MT
SCANSTA111MTX/NOPB SCANSTA111MTX	TSSOP	48	2 2	260 235	Detail	Download	sta111mt.ibs	NSUZXYTTE# SCANSTA111MT
SCANSTA111SM/NOPB SCANSTA111SM	FBGA	49	4 3	260 235	Detail	Download	sta111sm.ibs	NSUZXYTTE# SCANSTA111 SM
SCANSTA111SMX/NOPB SCANSTA111SMX	FBGA	49	4 3	260 235	Detail	Download	sta111sm.ibs	NSUZXYTTE# SCANSTA111 SM

All information pertaining to the RoHS Compliance Standard can be found at http://www.national.com/packaging/leadfree.

A RoHS compliance or an IPC 1752 report can be acquired at http://www.national.com/quality/green.

National's certificate of product compliance is located at RoHS Status.

CAD Symbols and Models
Download SCANSTA111 CAD Symbols

Models

sta111mt.ibs

Reliability Metrics

Part Number Process EFR Reject EFR Sample Size PPM LTA Rejects LTA Device Hours FITS MTTF (Hours)

SCANSTA111MT CMOS7 0 18406 0 0 1089000 4 309006723

SCANSTA111MTX CMOS7 0 18406 0 0 1089000 4 309006723

SCANSTA111SM CMOS7 0 18406 0 0 1089000 4 309006723

SCANSTA111SMX CMOS7 0 18406 0 0 1089000 4 309006723

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.

All information pertaining to the RoHS Compliance Standard can be found at http://www.national.com/packaging/leadfree.

A RoHS compliance or an IPC 1752 report can be acquired at http://www.national.com/quality/green.

National's certificate of product compliance is located at RoHS Status.

[Information as of 9-Feb-2010]