SCANSTA101 - Low Voltage IEEE 1149.1 STA Master
Datasheet Packaging Samples & Pricing Reliability Design Tools Models Knowledge Base

Features
Compatible with IEEE Std. 1149.1 (JTAG) Test Access Port and Boundary Scan Architecture
Supported by National's SCAN Ease (Embedded Application Software Enabler) Software Rev 2.0
Uses generic, asynchronous processor interface; compatible with a wide range of processors and PCLK frequencies
16-bit Data Interface (IP scalable to 32-bit)
2Kx32 bit dual-port memory addressing for access by the PPI or the 1149.1 master
Load-on-the-fly (LotF) and Preload operating modes supported
On-Board Sequencer allows multi-vector operations such as those required to load data into an FPGA
On-Board Compares support TDI validation against preloaded expected data
32-bit Linear Feedback Shift Register (LFSR) at the Test Data In (TDI) port
State, Shift, and BIST macros allow predetermined TMS sequences to be utilized
Operates at 3.3v supply voltages w/ 5V tolerant I/O
Outputs support Power-Down TRI-STATE mode.

General Description


The SCANSTA101 is designed to function as a test master for a IEEE 1149.1 test system. More...


 

ParametersValues
Temperature Min -40 deg C
Temperature Max 85 deg C

Also Recommended


SCANSTA1127 Port Addressable JTAG Multiplexor
Additional Resources
Online Seminars Design Tools


Block Diagram


*click for larger image



Datasheet
RoHS Compliance Information Size in KbytesDate Click link below to Download
SCANSTA101 Low Voltage IEEE 1149.1 STA Master 659
Kbytes
8-Mar-07 Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.


Package Availability, Models, Samples & Pricing
Part NumberPackageFactory Lead TimeModelsSamples &
Electronic
Orders
Budgetary PricingStd
Pack
Size
Package
Marking
Format
TypePinsSpec.MSL
Rating
Peak
Reflow
RoHS
Report
CAD
Symbols
WeeksQtyQty$US each
SCANSTA101SMFBGA49NOPB
STD
4
3
260
235
RoHS Download Full production
sta101sm.ibs
Samples
Buy Now
1K+$8.50tray
of
416
NSUZXYTTE#
SCANSTA101
SM
14 weeks2000
SCANSTA101SMXFBGA49NOPB
STD
4
3
260
235
RoHS Download Full production
sta101sm.ibs
 
Buy Now
1K+$8.50reel
of
2000
NSUZXYTT
SCANSTA101
SM
6 weeks2500

General Description


The SCANSTA101 is designed to function as a test master for a IEEE 1149.1 test system. The minimal requirements to create a tester are a microcomputer (uP, RAM/ROM, clock, etc.), SCANEASE r2.0 software, and a STA101.

The SCANSTA101 is an enhanced version of, and replacement for, the SCANPSC100. The additional features of the STA101 further allow it to offload some of the processor overhead while remaining flexible. The device architecture supports IEEE 1149.1, BIST, and IEEE 1532. The flexibility will allow it to adapt to any changes that may occur in 1532 and support yet unknown variants.

The SCANSTA101 is useful in improving vector throughput when applying serial vectors to system test circuitry and reduces the software overhead that is associated with applying serial patterns with a parallel processor. The SCANSTA101 features a generic Parallel Processor Interface (PPI) which operates by serializing data from the parallel bus for shifting through the chain of 1149.1 compliant components (i.e., scan chain). Writes can be controlled either by wait states or the ^DTACK line. Handshaking is accomplished with either polling or interrupts.

Reliability Metrics


Part Number Process EFR Reject EFR Sample Size PPM LTA Rejects LTA Device Hours FITS MTTF (Hours)
SCANSTA101SMCMOS70184060010890004309006723
SCANSTA101SMXCMOS70184060010890004309006723

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.


Design Tools


TitleSize in Kbytes Date Click link below to Download    
SCANEASE software assists users in developing embedded IEEE1149.1 (JTAG) solutions using the SCANSTA101 JTAG Master 2572 Kbytes 3-Dec-2008 View Download  

If you have trouble printing or viewing PDF file(s), see Printing Problems.

[Information as of 7-Nov-2009]