Features • High-efficiency PowerWise Technology Adaptive Voltage Scaling for intelligent energy management in AVS and DVS environments • PWI 2.0 open standard interface for system-level power management • Two digitally programmable 3.6MHz buck regulators to power dual-voltage domains • Five programmable LDOs for system functions such as: • PLL/Clock Generation • I/O • Memory Retention • Internal soft start • Variable regulator power up sequencing Description The LP5552 is a PWI ™ 2.0 compliant Energy Management Unit (EMU) for reducing power consumption in low-power, portable applications. The LP5552 contains 2 advanced, digitally controlled switching regulators for supplying variable voltages to a SoC or processor. The device also incorporates 5 programmable low-dropout, low-noise linear regulators for powering I/O, peripheral logic blocks, auxiliary system functions, and maintaining memory retention (dual-domains) in shutdown-mode. The device is controlled via the high-speed serial PWI 2.0 open-standard interface. The LP5552 operates cooperatively with PowerWise ® technology-compatible processors to optimize supply voltages adaptively (AVS - Adaptive Voltage Scaling) over process and temperature variations. It also supports dynamic voltage scaling (DVS) using frequency/voltage pairs from pre-characterized lookup tables. Key Specification • 2.7V to 4.8V Input Voltage Range • ±2% (typical) Output Voltage Accuracy • 800mA Output Current per Switcher • Up to 88% Switcher Efficiency • Digitally programmable from 0.6V — 1.235V • Five digitally programmable LDOs Applications • GSM/GPRS/EDGE & UMTS cellular handsets • Hand-held radios • PDAs • Battery-powered devices • Portable instruments

LP5552 System Block Diagram MY BRIEFCASE                                       Click any "Briefcase" icon to add an item

Typical Application *click for larger image LP5552 System Block Diagram	Connection Diagram click for larger image Chip view, top-down

Datasheet

Title		Size	Date	Other Language
	LP5552 PWI 2.0 and PowerWise ® Technology Compliant Energy Management Unit	1707 Kbytes	20-May-08

Featured Application Notes

Title		Size	Date	Other Language
	AN-1610: Application Note 1610 LP5552 Evaluation Board	10829 Kbytes	20-May-08

More Application Notes

Title		Size	Date	Other Language
	AN-1653: Application Note 1653 User's Graphical User Interface(GUI) for LP555x Evaluation Board PowerWise™ Technology Compliant Energy Management Unit	1675 Kbytes	7-Jun-07
	AN-1460: Application Note 1460 Emulating the PowerWise Interface Using GPIOs and Software	448 Kbytes	12-Apr-06
	AN-1857: Application Note 1857 LP5553 Evaluation Kit	3940 Kbytes	25-Mar-09
	AN-1467: Application Note 1467 LP5551 Evaluation Board	32843 Kbytes	8-Jun-07	日本語

Design Tools

Title	Size	Date
Article - Processor Energy Savings Through Adaptive Voltage Scaling
Article - Optimizing Power Consumption in the Mobile Multimedia Delivery Chain - Part One
Article - Optimizing Power Consumption in the Mobile Multimedia Delivery Chain - Part Two

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
LP5552TL	CMOS7	0	18406	0	0	1089000	4	309006723
LP5552TLX	CMOS7	0	18406	0	0	1089000	4	309006723

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.