Features • 2 300 mA buck regulators operate 180 degrees out of phase for reduced EMI • 1 MHz PWM switching frequency • 4 programmable LDOs ideal for I/O (two of these), PLL, and memory retention supply generation. • Supports high-efficiency PowerWise Technology Adaptive Voltage Scaling • PWI open standard interface for system power management • Digitally controlled intelligent voltage scaling • Auto or PWI controlled PFM mode transition • Internal soft start/startup sequencing. • Adjustable P- and N- well bias supply for threshold scaling • Power OK output. Description The LP5551 is a PWI 1.0 compliant Energy Management System for reducing power consumption of stand-alone mobile phone processors such as base-band or applications processors. The LP5551 contains two advanced, digitally controlled switching regulators for supplying variable voltage to processor core and memory. Two regulators provide P- and N- well biasing for threshold scaling applications. The device also integrates 4 programmable LDO-regulators for powering I/O, PLLs and maintaining memory retention in shutdown-mode. The device is controlled via the PWI open-standard interface. The LP5551 operates cooperatively with PowerWise™ technology compatible processors to optimize supply voltages adaptively over process and temperature variations or dynamically using frequency/voltage pre-characterized look-up tables and provides P- and N-well biasing for threshold scaling. Applications • Dual core processors • GSM/GPRS/EDGE & UMTS cellular handsets • Hand-held radios • PDAs • Battery powered devices • Portable instruments

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Datasheet

Title		Size	Date	Other Language
	LP5551 PowerWise™ Technology Compliant Energy Management Unit	3317 Kbytes	11-Mar-07

Featured Application Notes

Title		Size	Date	Other Language
	AN-1467: Application Note 1467 LP5551 Evaluation Board	32843 Kbytes	8-Jun-07	日本語
	AN-1653: Application Note 1653 User's Graphical User Interface(GUI) for LP555x Evaluation Board PowerWise™ Technology Compliant Energy Management Unit	1675 Kbytes	7-Jun-07

More Application Notes

Title		Size	Date	Other Language
	AN-1460: Application Note 1460 Emulating the PowerWise Interface Using GPIOs and Software	448 Kbytes	12-Apr-06
	AN-1857: Application Note 1857 LP5553 Evaluation Kit	3940 Kbytes	25-Mar-09
	AN-1610: Application Note 1610 LP5552 Evaluation Board	10829 Kbytes	20-May-08

Design Tools

Title	Size	Date
Article - Processor Energy Savings Through Adaptive Voltage Scaling

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
LP5551SQ	CMOS7	0	18406	0	0	1089000	4	309006723
LP5551SQX	CMOS7	0	18406	0	0	1089000	4	309006723

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

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