Datasheet
Package Availability, Models, Samples & Pricing
General Description
The LP38859 is a high current, fast response regulator which can maintain output voltage regulation with extremely low input
to output voltage drop. Fabricated on a CMOS process, the device operates from two input voltages: VBIAS provides voltage to drive the gate of the N-MOS power transistor, while VIN is the input voltage which supplies power to the load. The use of an external bias rail allows the part to operate from ultra
low VIN voltages. Unlike bipolar regulators, the CMOS architecture consumes extremely low quiescent current at any output load current.
The use of an N-MOS power transistor results in wide bandwidth, yet minimum external capacitance is required to maintain loop
stability.
The fast transient response of this device makes it suitable for use in powering DSP, Microcontroller Core voltages and Switch
Mode Power Supply post regulators. The LP38859 is available in TO-220 and TO-263 5-Lead packages.
Dropout Voltage: 240 mV (typical) at 3A load current.
Low Ground Pin Current: 14 mA (typical) at 3A load current.
Soft-Start: Programmable Soft-Start time.
Precision Output Voltage: ±1.0% for TJ = 25°C and ±2.0% for 0°C
≤ TJ
≤ +125°C, across all line and load conditions
Reliability Metrics
| Part Number |
Process |
EFR Reject |
EFR Sample Size |
PPM |
LTA Rejects |
LTA Device Hours |
FITS |
MTTF (Hours) |
|
LP38859S-0.8 | CS065 | 2 | 38968 | 52 | 0 | 4402000 | 1 | 1249079519
|
|
LP38859S-1.2 | CS065 | 2 | 38968 | 52 | 0 | 4402000 | 1 | 1249079519
|
|
LP38859SX-0.8 | CS065 | 2 | 38968 | 52 | 0 | 4402000 | 1 | 1249079519
|
|
LP38859SX-1.2 | CS065 | 2 | 38968 | 52 | 0 | 4402000 | 1 | 1249079519
|
|
LP38859T-0.8 | CS065 | 2 | 38968 | 52 | 0 | 4402000 | 1 | 1249079519
|
|
LP38859T-1.2 | CS065 | 2 | 38968 | 52 | 0 | 4402000 | 1 | 1249079519
|
Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR.
The Long Term Failure Rates were calculated
at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress
temperature of 150°C to an application temperature of 55°C.
For more information on Reliability Metrics, please click here.
Design Tools
| Title | Size in Kbytes |
Date |
 |
|
|
| Article - How to Power Sub-Micron CMOS Loads with an Efficient LDO |
|
|
View |
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Application Notes
| Title | Size in Kbytes |
Date |
 |
| AN-1480: Application Note 1480 LP38859S-1.2 Evaluation Board |
522 Kbytes |
3-Nov-06 |
Download |
AN-1480 (Chinese): Application Note 1480 LP38859S-1.2 Evaluation Board
|
228 Kbytes |
|
 |
More Application Notes
| Title | Size in Kbytes |
Date |
 |
| AN-1560: Application Note 1560 LP38852MR-ADJ Evaluation Board |
280 Kbytes |
17-Mar-07 |
Download |
AN-1560 (Chinese): Application Note 1560 LP38852MR-ADJ Evaluation Board
|
397 Kbytes |
|
 |
| AN-1479: Application Note 1479 LP38856S-1.2 Evaluation Board |
468 Kbytes |
3-Nov-06 |
Download |
AN-1479 (Chinese): Application Note 1479 LP38856S-1.2 Evaluation Board
|
230 Kbytes |
|
 |
| AN-1504: Application Note 1504 LP38853S-ADJ Evaluation Board |
573 Kbytes |
13-Mar-07 |
Download |
AN-1504 (Chinese): Application Note 1504 LP38853S-ADJ Evaluation Board
|
285 Kbytes |
|
 |
| AN-1815: Application Note 1815 LDOs Ease the Stress of Start-Up |
149 Kbytes |
23-Sep-08 |
Download |
[Information as of 8-Nov-2009]
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