LMK02000 - Precision Clock Distributor with Integrated PLL from the PowerWise® Family
Datasheet Packaging Samples & Pricing Eval. Boards Reliability Design Tools Reference Designs Knowledge Base

Features
• 20 fs additive jitter
• Integrated Integer-N PLL with outstanding normalized phase noise contribution of -224 dBc/Hz
• Clock output frequency range of 1 to 800 MHz
• 3 LVDS and 5 LVPECL clock outputs
• Dedicated divider and delay blocks on each clock output
• Pin compatible family of clocking devices
• 3.15 to 3.45 V operation
• Package: 48 pin LLP (7.0 x 7.0 x 0.8 mm)

General Description

The LMK02000 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. More...


  Typical Application
*click for larger image

Typical Application

ParametersValues
Max Output Clock Freq 1080 MHz
Min VCO Freq Undefined MHz
Max VCO Freq Undefined MHz
PLL Type PLL only
RMS Jitter 0.2 ps
LVDS Outputs 3
LVPECL Outputs 5
LVCMOS Outputs 0
Power Consumption 1.125 Watt
PowerWise Rating 6 28.125 mW x ps /ch
Min Supply Voltage 3.15 Volt
Max Supply Voltage 3.45 Volt
Temperature Min -40 deg C
Temperature Max 85 deg C
PowerWise Yes


Typical Performance

*click for larger image


  Also Recommended
LMK010001.6 GHz Low-Noise Clock Distributor (LVPECL/LVDS Outputs)
LMK02002▲Clock Jitter Cleaner With External VCXO (LVPECL Outputs)
LMK010101.6 GHz Low-Noise Clock Distributor (LVDS Outputs)
LMK010201.6 GHz Low-Noise Clock Distributor (LVPECL Outputs)
LMK03002CClock Jitter Cleaner With Integrated 1.7 GHz VCO (LVPECL Outputs)
Additional Resources
Online Seminars Design Tools


Block Diagram

*click for larger image



Datasheet
RoHS Compliance Information Size in KbytesDate Click link below to Download
LMK02000 Precision Clock Conditioner with Integrated PLL 453
Kbytes		 4-Sep-07 Download
LMK02000 Precision Clock Conditioner with Integrated PLL (Japanese)
 648 Kbytes   Download

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Package Availability, Models, Samples & Pricing
Part NumberPackageFactory Lead TimeModelsSamples &
Electronic
Orders		Budgetary PricingStd
Pack
Size		Package
Marking
Format
TypePinsSpec.MSL
Rating		Peak
Reflow		RoHS
Report		CAD
Symbols		WeeksQtyQty$US each
LMK02000EVAL-1LMK02000 Evaluation board with 245.76 VCXOFull productionN/A
 
Buy Now 		1+$290.001-
N/AN/A
LMK02000EVAL-2LMK02000 Evaluation board without VCXOFull productionN/A
 
Buy Now 		1+$260.001-
N/AN/A
LMK02000ISQLLP48NOPB3260RoHS Download Full productionN/A
Samples
Buy Now 		1K+$10.00reel
of
250		NS
UZXYTTE#
K02000 I
8 weeksN/A
LMK02000ISQXLLP48NOPB3260RoHS Download Full productionN/A
 
Buy Now 		1K+$10.00reel
of
2500		NS
UZXYTTE#
K02000 I
8 weeksN/A

General Description

The LMK02000 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high performance Integer-N Phase Locked Loop (PLL), three LVDS, and five LVPECL clock output distribution blocks.

Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVDS or LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.

The clock conditioner comes in a 48-pin LLP package and is footprint compatible with other clocking devices in the same family.

Reliability Metrics

Part Number Process EFR Reject EFR Sample Size PPM LTA Rejects LTA Device Hours FITS MTTF (Hours)
LMK02000ISQBICMOS8B+01152007439005211083656
LMK02000ISQXBICMOS8B+01152007439005211083656

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.


Design Tools

TitleSize in Kbytes Date Click link below to Download    
More design resources for the LMK clock conditoners     View    
Clock Design Tool and Other Software for LMK Clock Conditioners     View    

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Reference Designs
•RD-147 - Low IF Receiver Reference Design Board

Application Notes

TitleSize in Kbytes Date Click link below to Download
AN-1821: Application Note 1821 CPRI Repeater System 1497
Kbytes		 15-May-08 Download
AN-1734: Application Note 1734 Using the LMK03000C to Clean Recovered Clocks 188
Kbytes		 2-May-08 Download
AN-1734 (Chinese): Application Note 1734 Using the LMK03000C to Clean Recovered Clocks
 338 Kbytes  
AN-1865: Application Note 1865 Frequency Synthesis and Planning for PLL Architectures 151
Kbytes		 6-Feb-09 Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.

[Information as of 7-Nov-2009]