| Overview
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| Diagrams
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| Parametrics
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| Documents
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| Order
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| Boards
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| Packaging
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| Reliability
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| Videos
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Features
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Standard analog video sync separation for NTSC, PAL, 480I/P, 576I/P, 720P, and 1080I/P/PsF from Composite Video (CVBS), S-Video
(Y/C), and Component Video (YPBPR/GBR) interfaces
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Bi-level & tri-level sync compatible
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Composite, Horizontal, and Vertical Sync Outputs
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Burst/Back Porch Timing, Odd/Even Field, and Video Format Outputs
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Superior jitter performance on leading edge of HSync
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Automatic video format detection
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50% sync slicing for video inputs from 0.5 VPP to 2 VPP
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3.3V to 5V supply operation
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Description The LMH1981 is a high performance multi-format sync separator ideal for use in a wide range of video applications, such as
broadcast and professional video equipment and HDTV/DTV systems.
The input accepts standard analog SD/ED/HD video signals with either bi-level or tri-level sync, and the outputs provide all
of the critical timing signals in CMOS logic, which swing from rail-to-rail (VCC and GND) including Composite, Horizontal, and Vertical Syncs, Burst/Back Porch Timing, Odd/Even Field, and Video Format Outputs.
HSync features very low jitter on its leading (falling) edge, minimizing external circuitry needed to clean and reduce jitter
in subsequent clock generation stages.
The LMH1981 automatically detects the input video format, eliminating the need for programming using a microcontroller, and
applies precise 50% sync slicing to ensure accurate sync extraction at OH, even for inputs with irregular amplitude from improper termination or transmission loss. Its unique Video Format Output
conveys the total horizontal line count per field as an 11-bit binary serial data stream, which can be decoded by the video
system to determine the input video format and enable dynamic adjustment of system parameters, i.e.: color space or scaler
conversions. The LMH1981 is available in a 14-pin TSSOP package and operates over a temperature range of −40°C to +85°C.
Applications
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Broadcast and Professional Video Equipment
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HDTV/DTV Systems
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Genlock Circuits
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Video Capture Devices
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Set-Top Boxes (STB) & Digital Video Recorders (DVR)
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Video Displays
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Also Recommended
| LMH1980▲ | Smaller Form Factor, Consumer Applications |
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| Paramaters / Values | LMH1981 | LMH1980 |
| Function | Sync Separator
| Sync Separator
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| Supported Video Formats | SD bi-level and HD tri-level sync, NTSC , 720p , 1080i/p , 576i/p , 480i/p , PAL
| NTSC , SECAM , SD/PC bi-level and HD tri-level sync, 720p , 1080i/p , PC Sync on Green (VESA), 576i/p , 480i/p , PAL
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| Supply Voltage | 3.3 Volt
| 3.3 Volt
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| OtherSupply Voltage | 3.3V to 5V
| 3.3V to 5V
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| Temperature Min | -40 deg C
| -40 deg C
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| Temperature Max | 85 deg C
| 85 deg C
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Datasheet
Featured Application Notes
More Application Notes
Part Number(s) (NSID) | Top View | Availability | Current Reported Stock | Budgetary Pricing | Standard Pack Size |
LMH1981MT/NOPB
RoHS | 
TSSOP | Full production Lead Time: 6 weeks
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| $5.15 each at 1K+ pcs | rail of 94 |
LMH1981MTX/NOPB
RoHS | 
TSSOP | Full production Lead Time: 6 weeks
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| $5.15 each at 1K+ pcs | reel of 2500 |
Part Number(s) (NSID) | Description | Availability | Current Reported Stock | Budgetary Pricing | Standard Pack Size |
LMH1981MTEVAL
| Evaluation Board for the LMH1981 Multi-Format Video Sync Separator | Full production
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| $99.00 each | 1 |
Description:
The LMH1981 Evaluation Board can be used to evaluate the LMH1981 Multi-Format Sync Separator and as a reference for designing the PCB layout. Refer to the LMH1981 datasheet for more information on PCB layout considerations.
Contents:
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Part Number(s) (NSID) | Description | Availability | Current Reported Stock | Budgetary Pricing | Standard Pack Size |
ML571-1982CLK
| High-Performance SMPTE Video Clock Module for Xilinx ML571 Serial Digital Video Board | Full production
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| $299.00 each | 1 |
| National Semiconductor Enables the Xilinx Virtex 5 FPGA to Comply with SMPTE Jitter Requirements
The ML571-1982 CLK reference clock module features National Semiconductor`s highly-integrated multi-rate video clock generator. The LMH1982 can generate two simultaneous SD and HD output clocks genlocked to either the recovered H and V syncs from a Xilinx Virtex-5 LXT FPGA or from the outputs of an LMH1981 sync separator. Additionally, the LMH1982 provides an output Top of Frame timing pulse. In the event of a loss of reference, the device can be configured to default to either free run or holdover operation.
This reference design provides a proven video clocking solution for FPGAs that complies with stringent SDI jitter requirements, including the stringent SMPTE 424M standard for 3G-SDI. Integration, ease and flexibility of design, are demonstrated by the LMH1982 requiring a few additional components, and only one 27 MHz VCXO. An additional benefit of the LMH1982 is the programmable charge pump current control register for dynamic control of PLL bandwidth. A wide loop bandwidth can be programmed for faster PLL lock time or a narrow loop bandwidth can be programmed for maximum input attenuation.
See more details on the Video Timing Solutions page. |
Reliability Metrics
| Part Number |
Process |
EFR Reject |
EFR Sample Size |
PPM |
LTA Rejects |
LTA Device Hours |
FITS |
MTTF (Hours) |
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LMH1981MT | CMOS7 | 0 | 18406 | 0 | 0 | 1089000 | 4 | 309006723
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LMH1981MTX | CMOS7 | 0 | 18406 | 0 | 0 | 1089000 | 4 | 309006723
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Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR.
The Long Term Failure Rates were calculated
at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress
temperature of 150°C to an application temperature of 55°C.
For more information on Reliability Metrics, please click here.
| Factory Automation Solutions |
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| LMH1981 / LMH1982 SDI Clocking Demo |
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| Factory Automation Solutions Date: 8/5/2009 Length: 0:05:17 |
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| LMH1981 / LMH1982 SDI Clocking Demo Date: 7/2/2009 Length: 0:02:07 |
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