Features • Supports SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) serial digital video standards • Supports 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps serial data rate operation • Supports DVB-ASI at 270 Mbps • Single 3.3V supply operation • 430 mW typical power consumption • Integrated 4:1 multiplexed input • 0-30” FR4 equalizer on each multiplexed input • Two differential, reclocked outputs • Choice of second reclocked output or recovered clock output • Single 27 MHz external crystal or reference clock input • Manual rate select input • SD/HD operating rate indicator output • Lock Detect indicator output • Output mute function for data and clock • Auto/Manual reclocker bypass • Power saver mode with device power down control ( 10 mW typical power consumption in disabled state) • Differential LVPECL compatible serial data inputs and outputs • LVCMOS control inputs and indicator outputs • 48-pin LLP or 40-pin LLP package • Industrial temperature range: -40°C to +85°C • 48-pin LLP version footprint compatible with the LMH0056 and LMH0036 Description The LMH0356 3 Gbps HD/SD SDI Reclocker with 4:1 Input Mux and FR4 EQs retimes serial digital video data conforming to the SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) standards. The LMH0356 operates at serial data rates of 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps. The LMH0356 supports DVB-ASI operation at 270 Mbps. The LMH0356 includes an integrated 4:1 input multiplexer for selecting one of four input data streams for retiming. In addition, the four inputs of the LMH0356 each have an FR4 equalizer capable of equalizing 0-30” of FR4 trace length. The LMH0356 automatically detects the incoming data rate and adjusts itself to retime the incoming data to suppress accumulated jitter. The LMH0356 recovers the serial data-rate clock and optionally provides it as an output. The LMH0356 has two differential serial data outputs; the second output may be selected as a low-jitter, data-rate clock output. Controls and indicators are: serial clock or second serial data output select, manual rate select input, SD/HD rate indicator output, lock detect output, auto/manual data bypass, output mute, and device enable. The serial data inputs, outputs, and serial clock outputs are differential LVPECL compatible. The CML serial data and serial clock outputs are suitable for driving 100Ω differentially terminated networks. The control logic inputs and outputs are LVCMOS compatible. The LMH0356 is powered from a single 3.3V supply. Power dissipation is typically 430 mW. The device is available in two space–saving packages: a 7 X 7 mm 48-pin LLP (also known as QFN) and even more space–efficient 5 X 5 mm 40-pin LLP package. Applications • SDTV/HDTV and 3 Gbps serial digital video interfaces for: • Digital video routers and switchers • Digital video processing and editing equipment • DVB-ASI equipment • Video standards and format converters

Also Recommended LMH0346▲ See Also LMH0346 Triple-rate SDI Reclocker Typical Application MY BRIEFCASE                                       Click any "Briefcase" icon to add an item

Typical Application click for larger image Typical Application	Block Diagram click for larger image Block Diagram

Datasheet

Title		Size	Date	Other Language
	LMH0356 3 Gbps HD/SD SDI Reclocker with 4:1 Input Mux and FR4 EQs	702 Kbytes	9-Nov-09

Featured Application Notes

Title		Size	Date	Other Language
	AN-1983: Application Note 1983 LMH0356 Customization with SMBus	300 Kbytes	9-Jul-09

More Application Notes

Title		Size	Date	Other Language
	AN-1988: Application Note 1988 LMH0340 / LMH0341 SerDes Family LVDS Timing Overview	148 Kbytes	17-Jul-09
	AN-1971: Application Note 1971 Triple Rate SDI IP FPGA Resource Utilization on the SDXILEVK/AES-EXP-SDI-G Reference Design	195 Kbytes	6-May-09
	AN-2002: Application Note 2002 Replacing the CLC014 Adaptive Cable Equalizer with the LMH0074	158 Kbytes	22-Sep-09
	AN-2003: Application Note 2003 Replacing the CLC012 Adaptive Cable Equalizer with the LMH0074	160 Kbytes	6-Oct-09

Design Tools

Title	Size	Date
Reference Clock Loop Through Application	456 Kbytes	23-Jan-2009

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
LMH0356SQ	BICMOS8B+	0	1152	0	0	743900	5	211083656
LMH0356SQ-40	BICMOS8B+	0	1152	0	0	743900	5	211083656
LMH0356SQE	BICMOS8B+	0	1152	0	0	743900	5	211083656
LMH0356SQE-40	BICMOS8B+	0	1152	0	0	743900	5	211083656
LMH0356SQX	BICMOS8B+	0	1152	0	0	743900	5	211083656
LMH0356SQX-40	BICMOS8B+	0	1152	0	0	743900	5	211083656

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

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