Datasheet
Package Availability, Models, Samples & Pricing
General Description
The LMH0346 3 Gbps HD/SD SDI Reclocker retimes serial digital video data conforming to the SMPTE 424M, SMPTE 292M, and SMPTE
259M (C) standards. The LMH0346 operates at serial data rates of 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps.
The LMH0346 supports DVB-ASI operation at 270 Mbps.
The LMH0346 automatically detects the incoming data rate and adjusts itself to retime the incoming data to suppress accumulated
jitter. The LMH0346 recovers the serial data-rate clock and optionally provides it as an output. The LMH0346 has two differential
serial data outputs; the second output may be selected as a low-jitter, data-rate clock output. Controls and indicators are:
serial clock or second serial data output select, manual rate select input, SD/HD rate indicator output, lock detect output,
auto/manual data bypass and output mute. The serial data inputs, outputs, and serial clock outputs are differential LVPECL
compatible. The CML serial data and serial clock outputs are suitable for driving 100Ω differentially terminated networks.
The control logic inputs and outputs are LVCMOS compatible.
The LMH0346 is powered from a single 3.3V supply. Power dissipation is typically 370 mW.
The device is available in two space–saving packages: a 6.5 X 4.4 mm 20-pin e-TSSOP and an even more space–efficient 5 X
4 mm 24-pin LLP package.
More Application Notes
| Title | Size in Kbytes |
Date |
 |
| AN-1971: Application Note 1971 Triple Rate SDI IP FPGA Resource Utilization on the SDXILEVK/AES-EXP-SDI-G Reference Design |
195 Kbytes |
6-May-09 |
Download |
| AN-1934: Application Note 1934 Failsafe Options for LVDS Receivers |
122 Kbytes |
20-Jan-09 |
Download |
[Information as of 3-Jul-2009]
|