Datasheet
RoHS Compliance Information
| Size in Kbytes | Date |
 |
| LMH0341, LMH0041, LMH0071, LMH0051 3 Gbps, HD, SD, DVB-ASI SDI Deserializer with Loopthrough and LVDS Interface |
558
Kbytes |
5-Oct-09 |
Download |
LMH0341, LMH0041, LMH0071, LMH0051 3 Gbps, HD, SD, DVB-ASI SDI Deserializer with Loopthrough and LVDS Interface (Japanese)
 |
704 Kbytes |
|
 |
Package Availability, Models, Samples & Pricing
General Description
The LMH0341/0041/0071/0051 SDI Deserializers are part of National’s family of FPGA-Attach SER/DES products supporting 5-bit
LVDS interfaces with FPGAs. When paired with a host FPGA the LMH0341 automatically detects the incoming data rate and decodes
the raw 5-bit data words compliant to any of the following standards: DVB-ASI, SMPTE 259M, SMPTE 292M, or SMPTE 424M. See
for details on which Standards are supported per device.
The interface between the LMH0341 and the host FPGA consists of a 5-bit wide LVDS bus, an LVDS clock and an SMBus interface.
No external VCOs or clocks are required. The LMH0341 CDR detects the frequency from the incoming data stream, generates
a clean clock and transmits both clock and data to the host FPGA. The LMH0341, LMH0041 and LMH0071 include a serial reclocked
loopthrough with integrated SMPTE compliant cable driver. Refer to table 1 for a complete listing of single channel deserializers
offered in this family.
The FPGA-Attach SER/DES product family is supported by a suite of IP which allows the design engineer to quickly develop video
applications using the SER/DES products. The product is packaged in a physically small 48 pin LLP package.
Reliability Metrics
| Part Number |
Process |
EFR Reject |
EFR Sample Size |
PPM |
LTA Rejects |
LTA Device Hours |
FITS |
MTTF (Hours) |
|
LMH0341SQ | BICMOS8B+ | 0 | 1152 | 0 | 0 | 743900 | 5 | 211083656
|
|
LMH0341SQE | BICMOS8B+ | 0 | 1152 | 0 | 0 | 743900 | 5 | 211083656
|
|
LMH0341SQX | BICMOS8B+ | 0 | 1152 | 0 | 0 | 743900 | 5 | 211083656
|
Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR.
The Long Term Failure Rates were calculated
at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress
temperature of 150°C to an application temperature of 55°C.
For more information on Reliability Metrics, please click here.
Design Tools
| Title | Size in Kbytes |
Date |
|
|
|
| SMBus User Information Note |
291 Kbytes |
24-Apr-2008 |
View Online |
Download |
|
Application Notes
| Title | Size in Kbytes |
Date |
|
| AN-1988: Application Note 1988 LMH0340 / LMH0341 SerDes Family LVDS Timing Overview |
148
Kbytes |
17-Jul-09 |
Download |
| AN-1971: Application Note 1971 Triple Rate SDI IP FPGA Resource Utilization on the SDXILEVK/AES-EXP-SDI-G Reference Design |
195
Kbytes |
6-May-09 |
Download |
More Application Notes
| Title | Size in Kbytes |
Date |
|
| AN-2002: Application Note 2002 Replacing the CLC014 Adaptive Cable Equalizer with the LMH0074 |
158
Kbytes |
22-Sep-09 |
Download |
| AN-2003: Application Note 2003 Replacing the CLC012 Adaptive Cable Equalizer with the LMH0074 |
160
Kbytes |
6-Oct-09 |
Download |
| AN-2004: Application Note 2004 Replacing the CLC016 Reclocker with the LMH0026 |
154
Kbytes |
13-Oct-09 |
Download |
| AN-1977: Application Note 1977 LMH0346 Customization with SMBus |
287
Kbytes |
9-Jul-09 |
Download |
| AN-1983: Application Note 1983 LMH0356 Customization with SMBus |
300
Kbytes |
9-Jul-09 |
Download |
[Information as of 7-Nov-2009]
|
