Features
| | Independently drives two N-Channel MOSFETs |
| | Compound CMOS and bipolar outputs reduce output current variation |
| | 5A sink/3A source current capability |
| | Two channels can be connected in parallel to double the drive current |
| | Independent inputs (TTL compatible) |
| | Fast propagation times (25 ns typical) |
| | Fast rise and fall times (14 ns/12 ns rise/fall with 2 nF load) |
| | Dedicated input ground pin (IN_REF) for split supply or single supply operation |
| | Outputs swing from VCC to VEE which can be negative relative to input ground |
| | Available in dual non-inverting, dual inverting and combination configurations |
| | Shutdown input provides low power mode |
| | Supply rail under-voltage lockout protection |
| | Pin-out compatible with industry standard gate drivers |
General Description
The LM5110 Dual Gate Driver replaces industry standard gate drivers with improved peak output current and efficiency. More...
Applications
| | Synchronous Rectifier Gate Drivers |
| | Switch-mode Power Supply Gate Driver |
| | Solenoid and Motor Drivers |
| | Power Level Shifter |
| |
Typical Application
*click for larger image
| Parameters | Values |
| Topology |
Forward, push-pull, etc |
| Supply Min |
3.5 Volt |
| Supply Max |
14 Volt |
| Peak Sink Current |
5 Amp |
| Peak Source Current |
2 Amp |
| Output Rise Time (tr) |
15 ns |
| Output Fall Time tf |
15 ns |
| Bottom Driver Prop Delay |
25 ns |
| Quiescent Current |
1 mA |
| HighSide Drive |
No |
| LowSide Drive |
Yes |
| Outputs |
2 |
| LowGate Enable |
No |
| UVLO |
Yes |
| Shut down |
Yes |
| Internal BootDiode |
Not required |
| Input Control |
Dual, independent |
| Special Features |
Compound driver, negative output capable, one inverted, one non-inverted |
| RegType |
MOSFET Driver |
| Temperature Min |
-40 deg C |
| Temperature Max |
125 deg C |
Typical Performance
*click for larger image
| |
Also Recommended
| LM5111▲ | Dual 5A Low Side Gate Driver |
| LM5112▲ | Single 7A Low Side Compound Gate Driver |
Additional Resources
Online Seminars
Application Notes

Block Diagram
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