LM2512 - Mobile Pixel Link Level 0, 24-Bit RGB Display Interface Serializer with Dithering and Look Up Table Option- NOT RECOMMENDED FOR NEW DESIGN - See LM2512A

Datasheet Packaging Samples & Pricing Design Tools Knowledge Base

Features
24-bit RGB Display Interface support up to 640 x 480 VGA formats
24 to 18-bit Dithering
Optional Look Up Table for independent color correction
MPL-Level 0 Physical Layer
SPI Interface for Look Up Table control and loading
Low Power Consumption & Powerdown state
Level translation between host and display
Optional Auto Power Down on STOP PCLK
Frame Sequence bits automatically resync upon data or clock error
1.6V to 2.0V core / analog supply voltage
1.6V to 3.0V I/O supply voltage range

General Description


The LM2512 is a MPL Serializer (SER) that performs a 24-bit to 18-bit Dither operation and serialization of the video signals to Mobile Pixel link (MPL) levels on only 3 or 4 active signals. More...


  Typical Application
*click for larger image


  Also Recommended
LM2512ADirect Functional Replacement

Additional Resources


Design Tools (see below)


Block Diagram


*click for larger image



Datasheet
RoHS Compliance Information Size in KbytesDate Click link below to Download
LM2512 Mobile Pixel Link Level 0, 24-Bit RGB Display Interface Serializer with Dithering and Look Up Table Option — —NOT RECOMMENDED FOR NEW DESIGN - See LM2512A 467 Kbytes 6-Jun-08 View Online
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Package Availability, Models, Samples & Pricing
Part NumberPackageFactory Lead TimeModelsSamples &
Electronic
Orders
Budgetary PricingStd
Pack
Size
Package
Marking
Format
TypePinsSpec.MSL
Rating
Peak
Reflow
RoHS
Report
CAD
Symbols
WeeksQtyQty$US each
LM2512SMUFBGA49NOPB3260RoHS N/A PreliminaryN/A
 
Buy Now
1K+$2.59reel
of
1000
ZXYTT
LM25
12SM
6 weeksN/A
LM2512SMXUFBGA49NOPB3260RoHS N/A ObsoleteN/A
 
Buy Now
1K+$2.59reel
of
4500
ZXYTT
LM25
12SM
16 weeksN/A

General Description


The LM2512 is a MPL Serializer (SER) that performs a 24-bit to 18-bit Dither operation and serialization of the video signals to Mobile Pixel link (MPL) levels on only 3 or 4 active signals. An optional Look Up Table (Three X 256 X 8 bit RAM) is also provided for independent color correction. 18-bit Bufferless or partial buffer displays from QVGA (320 x 240) up to VGA (640 x 480) pixels can utilize a 24-bit video source.

The interconnect is reduced from 28 signals to only 3 or 4 active signals with the LM2512 and companion deserializer easing flex interconnect design, size constraints and cost.

The LM2512 SER resides by the application, graphics or baseband processor and translates the wide parallel video bus from LVCMOS levels to serial Mobile Pixel Link levels for transmission over a flex cable (or coax) and PCB traces to the DES located near or in the display module.

When in Power_Down, the SER is put to sleep and draws less than 10μA. The link can also be powered down by stopping the PCLK (DES dependant) or by the PD* input pins.

The LM2512 implements the physical layer of the MPL Level 0 Standard (MPL-0) and a 450 μA IOMS current (Class 0).

Design Tools


TitleSize in Kbytes Date Click link below to Download    
Optimizing Power Consumption in the Mobile Multimedia Delivery Chain - Part One     View    
Optimizing Power Consumption in the Mobile Multimedia Delivery Chain - Part Two     View    
The Challenges of Handheld Video     View    
Mobile Video Serial Screen Link: Part of a Healthy Power Consumption Diet     View    

If you have trouble printing or viewing PDF file(s), see Printing Problems.

[Information as of 21-Nov-2008]