Features 15-66 MHz 18:1/1:18 Serializer/Deserializer (2.376 Gbps full duplex throughput) Independent transmitter and receiver operation with separate clock, enable, and power down pins Hot plug protection (power up high impedance) and synchronization (receiver locks to random data) Wide ±5% reference clock frequency tolerance for easy system design using locally-generated clocks Line and local loopback modes Robust BLVDS serial transmission across backplanes and cables for low EMI No external coding required Internal PLL, no external PLL components required Single +3.3V power supply Low power: 90mA (typ) transmitter, 100mA (typ) at 66 MHz with PRBS-15 pattern ±100 mV receiver input threshold Loss of lock detection and reporting pin Industrial -40 to +85°C temperature range >2.0kV HBM ESD Compact, standard 80-pin LQFP package Description The DS92LV18 Serializer/Deserializer (SERDES) pair transparently translates a 18-bit parallel bus into a BLVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 18-bit, or less, bus over PCB traces and cables by eliminating the skew problems between parallel data and clock paths. It saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins. This SERDES pair includes built-in system and device test capability. The line loopback feature enables the user to check the integrity of the serial data transmission paths of the transmitter and receiver while deserializing the serial data to parallel data at the receiver outputs. The local loopback feature enables the user to check the integrity of the transceiver from the local parallel-bus side. The DS92LV18 incorporates modified BLVDS signaling on the high-speed I/O. BLVDS provides a low power and low noise environment for reliably transferring data over a serial transmission path. The equal and opposite currents through the differential data path control EMI by coupling the resulting fringing fields together.

	Block Diagram click for larger image
Typical Performance *click for larger image

Parameters Values Function SerDes Total Throughput 2376 Mbps Payload/Channel 1188 Mbps Clock Min 15 MHz Clock Max 66 MHz Input Compatibility LVTTL, BLVDS Output Compatibility LVDS/BLVDS, LVTTL Start/Stop Bit Yes Power Consumption_ 726 mW SupplyVoltage 3.3 Volt Eval Kit LVDS-18B-EVK ESD 2 kV Temperature Min -40 deg C Temperature Max 85 deg C Compression Ratio 18:1 Parallel Bus Width 18 bits Number Transmitters 1 Number Receivers 1 Communications Yes Sensing & Imaging Yes

Datasheets

Title		Size	Date	Other Language
	DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz	859 Kbytes	30-Jun-06	日本語

Application Notes

Title		Size	Date	Other Language
	AN-1376: Application Note 1376 External Serial Interface reduces Simultaneous Switching Output noise in FPGAs	1758 Kbytes	2-May-05
	AN-1909: Application Note 1909 DS15BA101 and DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES	360 Kbytes	2-Mar-09	中文

Other Technical Documents

Title		Type	Date
	SerDes Architectures and Applications	External Article	2007-03-29
	18-bit SerDes Design Guide (DS92LV18, SCAN921821)	Design Guide	2007-03-29

Part Number(s) (NSID)	Top View	Availability	Current Reported Stock	Budgetary Pricing	Pack Size
DS92LV18TVV/NOPB DS92LV18TVV RoHS Status	LQFP	Full production Lead Time: 6 weeks	Distributor Region Qty ARROW Worldwide 444 AVNET-EM Worldwide 92 DIGI-KEY Worldwide 476 FARNELL Europe and Asia 110 KEIKONG Asia Pacific 1000 MOUSER Worldwide 122 NEWARK Americas 110 RSL MICRO Asia Pacific 714 TAYLOR Americas 444	$8.10 each at 1K+ pcs	tray of 119
DS92LV18TVVX/NOPB DS92LV18TVVX RoHS Status	LQFP	Full production Lead Time: 6 weeks	Distributor Region Qty DIGI-KEY Worldwide 0	$8.10 each at 1K+ pcs	reel of 1000

All information pertaining to the RoHS Compliance Standard can be found at http://www.national.com/en/packaging/leadfree.html.

Moisture Sensitivity Level Data for DS92LV18.

A RoHS compliance or an IPC 1752 report can be acquired at http://www.national.com/en/packaging/greennopb.html.

National's certificate of product compliance for DS92LV18 is located at RoHS Status.

Part Number(s) (NSID)	Description	Availability	Current Reported Stock	Budgetary Pricing	Pack Size
LVDS-18B-EVK	18-Bit Bus LVDS SERDES Evaluation Board 15-66 MHz	Preliminary	Distributor Region Qty DIGI-KEY Worldwide 0 MOUSER Worldwide 1	$399.00 each	1
Description: The LVDS-18B-EVK is a complete kit for evaluation of National Semiconductor's 18-bit SerDes devices (DS92LV18 and SCAN921821) with low cost twisted pair cables as well as other 100-ohm differential cables. Contents: 18-Bit SerDes Evaluation Board - The board features a single SCAN921821 and two DS92LV18 devices. EVK User Manual What the user needs to provide: 3.3V supply Two 15-66 MHz clock sources with TTL/LVCMOS levels Connector adapter board (e.g. SMA2RJ45EVK) and accompanying cable assembly (e.g. CAT5e)

National Semiconductor follows the provisions of the Product Stewardship Guide for Customers (CSP-9-111C1) and Banned Substances and Materials of Interest Specification (CSP-9-111S2) for regulatory environmental compliance. Details may be found at: www.national.com/en/packaging/greennopb.html. Lead free products are RoHS compliant.

Lead Free product status is available through the search tool located here

Part Number(s) (NSID)	Weight (milligrams)	Type	Pins	MSL Rating	Peak Reflow	RoHS Status	CAD Symbols	Models	Package Marking Format
DS92LV18TVV/NOPB DS92LV18TVV	498.63 500.001	LQFP	80	3 3	260 260	Detail	Download	ibis file	NSUZXYTTE# DS92LV18TVV BBBBB
DS92LV18TVVX/NOPB DS92LV18TVVX	498.63 500.001	LQFP	80	3 3	260 260	Detail	Download	N/A	NSUZXYTTE# DS92LV18TVV BBBBB

All information pertaining to the RoHS Compliance Standard can be found at http://www.national.com/en/packaging/leadfree.html.

Moisture Sensitivity Level Data for DS92LV18.

A RoHS compliance or an IPC 1752 report can be acquired at http://www.national.com/en/packaging/greennopb.html.

National's certificate of product compliance for DS92LV18 is located at RoHS Status.

Design Tools

Title	Size	Date
18-bit SerDes Design Guide
18-Bit Bus LVDS SERDES Evaluation Board 15-66 MHz

CAD Symbols and Models Download DS92LV18 CAD Symbols

Models ibis file

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
DS92LV18TVV	CMOS8	1	13725	73	0	1774500	2	503519220
DS92LV18TVVX	CMOS8	1	13725	73	0	1774500	2	503519220

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.

All information pertaining to the RoHS Compliance Standard can be found at http://www.national.com/en/packaging/leadfree.html.

Moisture Sensitivity Level Data for DS92LV18.

A RoHS compliance or an IPC 1752 report can be acquired at http://www.national.com/en/packaging/greennopb.html.

National's certificate of product compliance for DS92LV18 is located at RoHS Status.

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