Features
| • | DC - 125 MHz / 250 Mbps low jitter, low skew, low power operation |
| • | Wide Input Common Mode Voltage Range allows up to ±2V of GND noise |
| • | Conforms to TIA/EIA-899 M-LVDS Standard |
| • | Pin selectable M-LVDS receiver type (1 or 2) |
| • | Controlled transition times (2.0 ns typ) minimize reflections |
| • | 8 kV ESD on M-LVDS I/O pins protects adjoining components |
| • | Flow-through pinout simplifies PCB layout |
| • | Small 5 mm x 5 mm LLP-32 space saving package |
General Description
The DS91M040 is a quad M-LVDS transceiver designed for driving / receiving clock or data signals to / from up to four multipoint
networks.
M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint
and multidrop cable and backplane applications. More...
Applications
| • | Multidrop / Multipoint clock and data distribution |
| • | High-Speed, Low Power, Short-Reach alternative to TIA/EIA-485/422 |
| • | Clock distribution in AdvancedTCA (ATCA) and |
| • | MicroTCA (μTCA) backplanes |
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Typical Application
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Parametric Table
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Parametric Table
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Typical Performance
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Additional Resources
Design Tools (see below)
Application Notes (see below)
Block Diagram
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RoHS Compliance Information
