DS91D180 - 100 MHz M-LVDS Line Driver/Receiver Pair

Datasheet Packaging Samples & Pricing Reliability Models Knowledge Base

Features
•DC to 100+ MHz / 200+ Mbps low power, low EMI operation
•Optimal for ATCA, uTCA clock distribution networks
•Meets or exceeds TIA/EIA-899 M-LVDS Standard
•Wide Input Common Mode Voltage for Increased Noise Immunity
•DS91D180 has type 1 receiver input
•DS91C180 has type 2 receiver input for fail-safe functionality
•Industrial temperature range
•Space saving SOIC-14 package (JEDEC MS-012)

General Description

The DS91D180 and DS91C180 are 100 MHz M-LVDS (Multipoint Low Voltage Differential Signaling) line driver/receiver pairs designed for applications that utilize multipoint networks (e.g. More...


  Typical Application
*click for larger image


Parametric Table     expand
Parametric Table    collapse
PHY Type Driver/Receiver Pair
Family M-LVDS
Channels 2 Channels
Max Data Rate 200 Mbps
Input Compatibility LVTTL/MLVDS
Output Compatibility LVTTL/MLVDS
Power Consumption_ 66 mW
Special Features Wide VCM, '180 pinout
SupplyVoltage 3.3 Volt
JTAG1149.1 No
PHY Type Driver/Receiver Pair
Family M-LVDS
Channels 2 Channels
Max Data Rate 200 Mbps
Input Compatibility LVTTL/MLVDS
Output Compatibility LVTTL/MLVDS
Power Consumption_ 66 mW
Special Features Wide VCM, '180 pinout
SupplyVoltage 3.3 Volt
JTAG1149.1 No
Temperature Min -40 deg C
Temperature Max 85 deg C
Automotive Selection Guide Yes
Function Driver/Receiver
View Using Catalog

  Also Recommended
DS91C180For Version With MLVDS Type-2 (Control) Input With Failsafe And 100mV Offset
DS91D176For MLVDS Evaluation Kit

Block Diagram

*click for larger image



Datasheet
RoHS Compliance Information Size in KbytesDate Click link below to Download
DS91D180/DS91C180 100 MHz M-LVDS Line Driver/Receiver Pair 395 Kbytes 3-Oct-08 Download
DS91D180/DS91C180 100 MHz M-LVDS Line Driver/Receiver Pair (Japanese)
 494 Kbytes   Download

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Package Availability, Models, Samples & Pricing
Part NumberPackageFactory Lead TimeModelsSamples &
Electronic
Orders		Budgetary PricingStd
Pack
Size		Package
Marking
Format
TypePinsSpec.MSL
Rating		Peak
Reflow		RoHS
Report		CAD
Symbols		WeeksQtyQty$US each
DS91D180TMASOIC NARROW14NOPB1260RoHS Download Full production
ds91d180tma.ibs		Samples
Buy Now 		1K+$1.60rail
of
55		NSUZXYTT
DS91D180
TMA
6 weeks500
DS91D180TMAXSOIC NARROW14NOPB1260RoHS Download Full productionN/A
 
Buy Now 		1K+$1.60reel
of
2500		NSUZXYTT
DS91D180
TMA
6 weeksN/A

General Description

The DS91D180 and DS91C180 are 100 MHz M-LVDS (Multipoint Low Voltage Differential Signaling) line driver/receiver pairs designed for applications that utilize multipoint networks (e.g. clock distribution in ATCA and uTCA based systems). M-LVDS is a new bus interface standard (TIA/EIA-899) optimized for multidrop networks. Controlled edge rates, tight input receiver thresholds and increased drive strength are sone of the key enhancments that make M-LVDS devices an ideal choice for distributing signals via multipoint networks.

The DS91D180/DS91C180 driver input accepts LVTTL/LVCMOS signals and converts them to differential M-LVDS signal levels. The DS91D180/DS91C180 receiver accepts low voltage differential signals (LVDS, B-LVDS, M-LVDS, LV-PECL and CML) and converts them to 3V LVCMOS signals. The DS91D180 device has a M-LVDS type 1 receiver input with no offset.The DS91C180 device has a type 2 receiver input which enable failsafe functionality.

Reliability Metrics

Part Number Process EFR Reject EFR Sample Size PPM LTA Rejects LTA Device Hours FITS MTTF (Hours)
DS91D180TMACMOS7016561009540004270700104
DS91D180TMAXCMOS7016561009540004270700104

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.


Application Notes

TitleSize in Kbytes Date Click link below to Download
AN-1503: Application Note 1503 Designing an ATCA Compliant M-LVDS Clock Distribution Network 2926 Kbytes 20-Nov-07 Download
AN-1503 (Chinese): Application Note 1503 Designing an ATCA Compliant M-LVDS Clock Distribution Network
 463 Kbytes  
AN-1926: Application Note 1926 An Introduction to M-LVDS and Clock and Data Distribution Applications 344 Kbytes 4-Dec-08 Download

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[Information as of 4-Jul-2009]