DS90UR241 - 5-43MHz DC-Balanced 24-Bit FPD-Link II Serializer

Datasheet	Packaging	Samples & Pricing	Eval. Boards	Reliability	Design Tools	Reference Designs	Models	Knowledge Base

Features

•	Supports displays with 18-bit color depth
•	5MHz to 43MHz pixel clock
•	Automotive grade product AEC-Q100 grade 2 qualified
•	24:1 interface compression
•	Embedded clock with DC Balancing supports AC-coupled data transmission
•	Capable to drive up to 10 meters shielded twisted-pair cable
•	No reference clock required (deserializer)
•	Meets ISO 10605 ESD - Greater than 8 kV HBM ESD structure
•	Hot plug support
•	EMI Reduction - Serializer accepts spread spectrum input; data randomization and shuffling on serial link; Deserializer provides Adjustable PTO (progressive turn-on) LVCMOS outputs
•	@Speed BIST (built-in self test) to validate LVDS transmission path
•	Individual power-down controls for both Transmitter and Receiver
•	Power supply range 3.3V ± 10%
•	48-pin TQFP package for Transmitter and 64-pin TQFP package for Receiver
•	Temperature range -40°C to +105°C
•	Backward compatible mode with DS90C241/DS90C124

General Description

The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control FPD-Link II LVDS serial stream with embedded clock information. More...

Applications

•	Automotive Central Information Display
•	Automotive Instrument Cluster Display
•	Automotive Heads-Up Display
•	Remote Camera-based Driver Assistance Systems

Typical Application

*click for larger image

Parameters Values

Function Serializer

Color Depth 18 bpp

Pixel Clock Max 43 MHz

Pixel Clock Min 5 MHz

Compression Ratio 24:1

Input Compatibility LVCMOS

Output Compatibility FPD-Link LVDS

Signal Conditioning Pre-emphasis, VOD Select

AEC Q-100 Automotive Grade 2

Power Consumption_ 215 mW

Total Throughput 1032 Mbps

Payload/Channel 1032 Mbps

Reference Clock Req'd Deserializer No

Start/Stop Bit Yes

Embedded Clock Yes

Parallel Bus Width 24 bits

Special Features Pre-Emphasis, DC Balance, VOD Select

Eval Kit SERDESUR-43USB

ESD 8 kV

Supply Voltage 3.3 Volt

Temperature Min -40 deg C

Temperature Max 105 deg C

PowerWise No

Automotive Yes

Communications No

Sensing & Imaging Yes

DisplayType LCD

Also Recommended

DS90C124▲	Deserializer, 5-35 MHz, –40°C To +105°C, 10 Meter Drive Strength
DS90C241▲	Serializer, 5-35 MHz, –40°C To +105°C, 10 Meter Drive Strength
DS90UR124▲	Deserializer, 5-43 MHz, –40°C To +105°C, 10 Meter Drive Strength (FOR COMPLETE CHIPSET)
DS99R101▲	Serializer & DS99R102 Deserializer Chipset, 3-40 MHz, 0°C To +70°C, 2 Meter Drive Strength
DS99R103▲	Serializer & DS99R104 Deserializer Chipset, 3-40 MHz, -40°C To +85°C, 5 Meter Drive Strength
DS99R105▲	Serializer & DS99R106 Deserializer Chipset, 3-40 MHz, 0°C To +70°C, 10 Meter Drive Strength

Additional Resources

Design Tools

Connection Diagram

*click for larger image

Datasheet

RoHS Compliance Information	Size in Kbytes	Date
DS90UR241Q DS90UR124Q 5-43 MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset	1114 Kbytes	4-Sep-09	Download
DS90UR241Q DS90UR124Q 5-43 MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset (Japanese)	948 Kbytes

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Package Availability, Models, Samples & Pricing

Part Number

Package

Factory Lead Time

Models

Samples &
Electronic
Orders

Budgetary Pricing

Std
Pack
Size

Package
Marking
Format

Type

Pins

Spec.

MSL
Rating

Peak
Reflow

RoHS
Report

CAD
Symbols

Weeks

Qty

$US each

SERDESUR-43USB

Evaluation Kit for DS90UR241/DS90UR124 Serializer and Deserializer Chipset

Full production

N/A

$250.00

N/A

DS90UR241IVS

TQFP

NOPB

260

RoHS

N/A

Not recommended for new designs
(as of 15-Feb-08)

ds90ur241ivs.ibs

1K+

$5.30

tray
of
250

NSUZXYTT
DS90UR24
1IVS

8 weeks

2000

DS90UR241QVS

TQFP

NOPB

260

RoHS

N/A

Full production

ds90ur241ivs.ibs

1K+

$5.30

tray
of
250

NSUZXYTT
DS90UR24
1QVS

8 weeks

500

DS90UR241IVSX

TQFP

NOPB

260

RoHS

N/A

Not recommended for new designs
(as of 15-Feb-08)

ds90ur241ivs.ibs

1K+

$5.30

reel
of
1000

NSUZXYTT
DS90UR24
1IVS

8 weeks

2500

DS90UR241QVSX

TQFP

NOPB

260

RoHS

N/A

Full production

ds90ur241ivs.ibs

1K+

$5.30

reel
of
1000

NSUZXYTT
DS90UR24
1QVS

6 weeks

15000

General Description

The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control FPD-Link II LVDS serial stream with embedded clock information. This chipset is ideally suited for driving graphical data to displays requiring 18-bit color depth - RGB666 + HS, VS, DE + 3 additional general purpose data channels. This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. It saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.

The DS90UR241/124 incorporates FPD-Link II LVDS signaling on the high-speed I/O. FPD-Link II LVDS provides a low power and low noise environment for reliably transferring data over a serial transmission path. By optimizing the Serializer output edge rate for the operating frequency range EMI is further reduced.

In addition, the device features pre-emphasis to boost signals over longer distances using lossy cables. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects. Using National Semiconductor’s proprietary random lock, the Serializer’s parallel data are randomized to the Deserializer without the need of REFCLK.

Reliability Metrics

Part Number	Process	EFR Sample Size	LTA Device Hours	FITS	MTTF (Hours)
DS90UR241IVS	CMOS7	18406	1089000	4	309006723
DS90UR241IVSX	CMOS7	18406	1089000	4	309006723
DS90UR241QVS	CMOS7	18406	1089000	4	309006723
DS90UR241QVSX	CMOS7	18406	1089000	4	309006723

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.

Design Tools

Title	Size in Kbytes	Date
LVDS Owner's Manual - 4th Edition			View
Evaluation Kit for DS90UR241/DS90UR124 Serializer and Deserializer Chipset			View

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Reference Designs

•	RD-167 - High Efficiency Portable Media Player (PMP) Docking Station

Application Notes

Title	Size in Kbytes	Date
AN-1898: Application Note 1898 LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces	308 Kbytes	4-Sep-08	Download
AN-1826: Application Note 1826 Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers	251 Kbytes	24-Mar-08	Download
AN-1909: Application Note 1909 DS15BA101 and DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES	360 Kbytes	2-Mar-09	Download
AN-1807: Application Note 1807 FPD-Link II Display SerDes Overview	106 Kbytes	4-Nov-09	Download

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[Information as of 7-Nov-2009]