Features • 800 Mbps data rate per channel • Low output skew and jitter • LVDS/CML/LVPECL compatible input, LVDS output • On-chip 100Ω input and output termination • 12 kV ESD protection on LVDS Outputs • Single 3.3V supply • Very low power consumption • Industrial -40 to +85°C temperature range • Small LLP Package Footprint Description The DS90LV804 is a four channel 800 Mbps LVDS buffer/repeater. In many large systems, signals are distributed across cables and signal integrity is highly dependent on the data rate, cable type, length, and the termination scheme. In order to maximize signal integrity, the DS90LV804 features both an internal input and output (source) termination to eliminate these extra components from the board, and to also place the terminations as close as possible to receiver inputs and driver output. This is especially significant when driving longer cables. The DS90LV804, available in the LLP (Leadless Leadframe Package) package, minimizes the footprint, and improves system performance. An output enable pin is provided, which allows the user to place the LVDS outputs and internal biasing generators in a TRI-STATE, low power mode. The differential inputs interface to LVDS, and Bus LVDS signals such as those on National's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The differential inputs are internally terminated with a 100Ω resistor to improve performance and minimize board space. This function function is especially useful for boosting signals over lossy cables or point-to-point backplane configurations.

Also Recommended DS15BR400▲ Low Jitter 2.0 Gbps Quad With Pre-emphasis DS90LV004▲ 1.5 Gbps Quad With Pre-emphasis MY BRIEFCASE                                       Click any "Briefcase" icon to add an item

Typical Application *click for larger image	Block Diagram *click for larger image
Typical Performance *click for larger image

Datasheet

Title		Size	Date	Other Language
	DS90LV804 4-Channel 800 Mbps LVDS Buffer/Repeater	250 Kbytes	8-Mar-09

Featured Application Notes

Title		Size	Date	Other Language
	AN-1926: Application Note 1926 An Introduction to M-LVDS and Clock and Data Distribution Applications	344 Kbytes	4-Dec-08	中文

More Application Notes

Title		Size	Date	Other Language
	AN-971: Application Note 971 An Overview of LVDS Technology	168 Kbytes	5-Oct-98	日本語

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
DS90LV804TSQ	CMOS8	1	13140	55	0	1615500	3	458102536
DS90LV804TSQX	CMOS8	1	13140	55	0	1615500	3	458102536

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

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