Features
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Up to 6.384 Gbps throughput
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66MHz to 133MHz input clock support
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Reduces cable and connector size and cost
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Cable Deskew function
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DC balance reduces ISI distortion
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For point-to-point backplane or cable applications
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Low power, 890 mW typ at 133MHz
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Flow through pinout for easy PCB design
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+3.3V supply voltage
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100-pin TQFP package
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Conforms to TIA/EIA-644-A-2001 LVDS Standard
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Description The DS90CR486 receiver converts eight Low Voltage Differential Signaling (LVDS) data streams back into 48 bits of LVCMOS/LVTTL
data. Using a 133MHz clock, the data throughput is 6.384Gbit/s (798Mbytes/s).
The multiplexing of data lines provides a substantial cable reduction. Long distance parallel single-ended buses typically
require a ground wire per active signal (and have very limited noise rejection capability). Thus, for a 48-bit wide data and
one clock, up to 98 conductors are required. With this Channel Link chipset as few as 19 conductors (8 data pairs, 1 clock
pair and a minimum of one ground) are needed. This provides an 80% reduction in interconnect width, which provides a system
cost savings, reduces connector physical size and cost, and reduces shielding requirements due to the cables' smaller form
factor.
The DS90CR486 deserializer is improved over prior generations of Channel Link devices and offers higher bandwidth support
and longer cable drive with three areas of enhancement. To increase bandwidth, the maximum clock rate is increased to 133
MHz and 8 serialized LVDS outputs are provided. Cable drive is enhanced with a user selectable pre-emphasis (on DS90CR485)
feature that provides additional output current during transitions to counteract cable loading effects. Optional DC balancing
on a cycle-to-cycle basis, is also provided to reduce ISI (Inter-Symbol Interference). With pre-emphasis and DC balancing,
a low distortion eye-pattern is provided at the receiver end of the cable. A cable deskew capability has been added to deskew
long cables of pair-to-pair skew. These three enhancements allow long cables to be driven.
The DS90CR486 is intended to be used with the DS90CR485 Channel Link Serializer. It is also backward compatible with serializers
DS90CR481 and DS90CR483. The DS90CR486 is footprint compatible with the DS90CR484.
The chipset is an ideal solution to solve EMI and interconnect size problems for high-throughput point-to-point applications.
For more details, please refer to the “Applications Information” section of this datasheet.
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