Features • Up to 6.384 Gbps throughput • 66MHz to 133MHz input clock support • Reduces cable and connector size and cost • Pre-emphasis reduces cable loading effects • DC balance reduces ISI distortion • 24 bit double edge inputs • 3V Tolerant LVCMOS/LVTTL inputs • Low power, 2.5V supply • Flow-through pinout • In 100-pin TQFP package • Conforms with TIA/EIA-644-A LVDS standard. Description The DS90CR485 serializes the 24 LVCMOS/LVTTL double edge inputs (48 bits data latched in per clock cycle) onto 8 Low Voltage Differential Signaling (LVDS) streams. A phase-locked transmit clock is also in parallel with the data streams over a 9th LVDS link. The reduction of the wide TTL bus to a few LVDS lines reduces cable and connector size and cost. The double edge input strobes data on both the rising and falling edges of the clock. This minimizes the pin count required and simplifies PCB routing between the host chip and the serializer. This chip is an ideal solution to solve EMI and interconnect size problems for high throughput point-to-point applications. The DS90CR485 is intended for use with the DS90CR486 Channel-Link receiver. It is also backward compatible with other Channel-Link receiver such as the DS90CR482 and DS90CR484. For more details, please refer to the "Applications Information" section of this datasheet.

Also Recommended DS90CR486▲ 133Mhz LVDS 48-Bit Channel Link Deserializer MY BRIEFCASE                                       Click any "Briefcase" icon to add an item

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Datasheet

Title		Size	Date	Other Language
	DS90CR485 133MHz 48-bit Channel Link Serializer (6.384 Gbps)	330 Kbytes	6-Oct-03	日本語

Featured Application Notes

Title		Size	Date	Other Language
	AN-1538: Application Note 1538 Interfacing National’s DS90CR218A and LM98714	280 Kbytes	17-Mar-07	中文

More Application Notes

Title		Size	Date	Other Language
	AN-1538: Application Note 1538 Interfacing National’s DS90CR218A and LM98714	280 Kbytes	17-Mar-07	中文

Design Tools

Title	Size	Date
Channel Link Design Guide	3173 Kbytes	29-Mar-2007
48-bit Channel Link Serializer / Deserializer Evaluation Board 133MHz

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
DS90CR485VS	CMOS8	1	13140	55	0	1615500	3	458102536
DS90CR485VSX	CMOS8	1	13140	55	0	1615500	3	458102536

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

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