DS90CR218A   
+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link Receiver - 85 MHz 		Click link to Download

Features
•12 to 85 MHz shift clock support
•50% duty cycle on receiver output clock
•Low power consumption
•±1V common-mode range (around +1.2V)
•Narrow bus reduces cable size and cost
•Up to 1.785 Gbps throughput
•Up to 223 Mbytes/sec bandwidth
•345 mV (typ) swing LVDS devices for low EMI
•PLL requires no external components
•Rising edge data strobe
•Compatible with TIA/EIA-644 LVDS standard
•Low profile 48-lead TSSOP package

Description

The DS90CR218A receiver deserializes three input LVDS data streams into 21 bits of CMOS/TTL output data. When operating at the maximum input clock rate of 85 Mhz, the LVDS data is received at 595 Mbps per data channel for a total data throughput of 1.785 Gbit/sec (233 Mbytes/sec).

The narrow bus and LVDS signalling of the DS90CR218A is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces.



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                                              DS90CR218A
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Typical Application
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Block Diagram
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ParametersValues
Function Deserializer
Total Throughput 1785 Mbps
Payload/Channel 595 Mbps
Clock Min 12 MHz
Clock Max 85 MHz
Input Compatibility LVDS
Output Compatibility LVTTL
Power Consumption_ 297 mW
SupplyVoltage 3.3 Volt
Eval Kit CLINK3V28BT-85
ESD 7 kV
Temperature Min -10 deg C
Temperature Max 70 deg C
Compression Ratio 21:3
Number Receivers 1
Sensing & Imaging Yes
Parallel Bus Width 21 bits

Datasheet
TitleSizeDateOther
Language
DS90CR218A +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 12 MHz to 85 MHz616
Kbytes		19-Oct-06日本語


Featured Application Notes
TitleSizeDateOther
Language
AN-1538: Application Note 1538 Interfacing National’s DS90CR218A and LM98714280
Kbytes		17-Mar-07 中文


More Application Notes
TitleSizeDateOther
Language
AN-1538: Application Note 1538 Interfacing National’s DS90CR218A and LM98714280
Kbytes		17-Mar-07 中文

Part Number(s)
(NSID)		Top ViewAvailabilityCurrent Reported StockBudgetary PricingStandard Pack Size
DS90CR218AMTD/NOPB
DS90CR218AMTD

RoHS



TSSOP		Full production
Lead Time: 6 weeks

Samples
DistributorRegionQty
ARROWWorldwide190
AVNET-EMWorldwide16
DIGIKEYWorldwide400
FARNELLEurope and Asia107
FUTUREWorldwide114
RS COMPONENTSWorldwide38
$3.79 each at 1K+ pcsrail
of
38
DS90CR218AMTDX/NOPB

RoHS



TSSOP		Full production
Lead Time: 6 weeks

 
DistributorRegionQty
AITGAsia Pacific1001
DIGIKEYWorldwide0
$3.79 each at 1K+ pcsreel
of
1000

Part Number(s)
(NSID)		DescriptionAvailabilityCurrent Reported StockBudgetary PricingStandard Pack Size
CLINK3V28BT-85
28-Bit Channel Link Serializer / Deserializer Evaluation Board 20-85MHzPreliminary


 
DistributorRegionQty
DIGIKEYWorldwide0
NATIONALWorldwide0
$500.00 each1

Description:

This Channel Link evaluation kit contains a transmitter (Tx) board, a receiver (Rx) board, and interfacing cables. This kit will demonstrate the Channel Link chipset transmitting data streams using Low Voltage Differential Signaling (LVDS).

The transmitter board accepts LVTTL/LVCMOS data signals from an incoming data source along with the clock signal. The LVDS transmitter converts the LVTTL/LVCMOS parallel lines into four serialized LVDS data pairs plus a LVDS clock. The serial data streams toggle at 3.5 times the clock rate.

The receiver board accepts the LVDS serialized data streams plus clock and converts the data back into parallel LVTTL/LVCMOS data signals and clock.

This evaluation kit can also be used with the 21-bit serializers and deserializers by leaving the unused I/O disconnected.

Contents:

  • One Transmitter board with the DS90CR287MTD - 28 bit Transmitter
  • Receiver board with the DS90CR288AMTD - 28 bit Receiver
  • One 2-meter Amphenol Spectra Strip Cable interface
  • One 60-pin IDC Flat Ribbon Cable
  • Evaluation Kit Documentation
  • DS90CR287/DS90CR288ADatasheet
  • Channel Link Application Notes AN-1041 and AN-1108

What the users need to provide:

  • 3.3V supply
  • Equipment to transmit for 28 parallel LVCMOS bits + 1 Tx clock
  • For BERT, Receiver for 28 parallel LVCMOS data + 1 Rx clock

Part Number(s)
(NSID)		Top ViewTypePinsMSL RatingPeak ReflowRoHSCAD SymbolsModelsPackage
Marking
Format
DS90CR218AMTD/NOPB
DS90CR218AMTD
TSSOP482
2		260
235		RoHSDownload
90cr218a.ibs		NSUZXYTTE#
DS90CR218AMTD
BBBBB
DS90CR218AMTDX/NOPB
TSSOP482260RoHSDownloadN/A
NSUZXYTTE#
DS90CR218AMTD
BBBBB

Reliability Metrics
Part Number Process EFR Reject EFR Sample Size PPM LTA Rejects LTA Device Hours FITS MTTF (Hours)
DS90CR218AMTDCMOS70184060010890004309006723
DS90CR218AMTDXCMOS70184060010890004309006723

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.


[Information as of 21-Nov-2009]