DS90C124 - 5-35MHz DC- Balanced 24-Bit FPD-Link II Deserializer
Datasheet Packaging Samples & Pricing Reliability Design Tools Models Knowledge Base

Features
5 MHz–35 MHz clock embedded and DC-Balancing 24:1 and 1:24 data transmissions
User defined Pre-Emphasis driving ability through external resistor on LVDS outputs and capable to drive up to 10 meters shielded twisted-pair cable
User selectable clock edge for parallel data on both Transmitter and Receiver
Internal DC Balancing encode/decode – Supports AC-coupling interface with no external coding required
Individual power-down controls for both Transmitter and Receiver
Embedded clock CDR (clock and data recovery) on Receiver and no external source of reference clock needed
All codes RDL (random data lock) to support live-pluggable applications
LOCK output flag to ensure data integrity at Receiver side
Balanced TSETUP/THOLD between RCLK and RDATA on Receiver side
PTO (progressive turn-on) LVCMOS outputs to reduce EMI and minimize SSO effects
All LVCMOS inputs and control pins have internal pulldown
On-chip filters for PLLs on Transmitter and Receiver
Temperature range –40°C to +105°C
Greater than 8 kV HBM ESD tolerant
Meets AEC-Q100 compliance
Power supply range 3.3V ± 10%
48-pin TQFP package

General Description


The DS90C241/DS90C124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information. More...


  Typical Application
*click for larger image


ParametersValues
Function Deserializer
Color Depth 18 bpp
Pixel Clock Max 35 MHz
Pixel Clock Min 5 MHz
Input Compatibility FPD-Link II LVDS
Output Compatibility LVCMOS
AEC Q-100 Automotive Grade 2
EMI Reduction Progressive Turn On (PTO), Slew Rate Control
Total Throughput 840 Mbps
Payload/Channel 840 Mbps
Reference Clock Req'd Deserializer No
Embedded Clock Yes
Parallel Bus Width 24 bits
Special Features Progressive Turn On (PTO) on Parallel Bus, Slew Rate Control
Eval Kit SERDES24-35USB
ESD 8 kV
Supply Voltage 3.3 Volt
Temperature Min -40 deg C
Temperature Max 105 deg C
PowerWise No
Automotive Yes
Communications No
Sensing & Imaging Yes
DisplayType LCD

  Also Recommended
DS90C241Serializer, 5-35 MHz, –40°C To +105°C, 10 Meter Drive Strength (FOR COMPLETE CHIPSET)
DS90UR124Deserializer, 5-43 MHz, –40°C To +105°C, 10 Meter Drive Strength
DS90UR241Serializer, 5-43 MHz, –40°C To +105°C, 10 Meter Drive Strength
DS99R101Serializer & DS99R102 Deserializer Chipset, 3-40 MHz, 0°C To +70°C, 2 Meter Drive Strength
DS99R103Serializer & DS99R104 Deserializer Chipset, 3-40 MHz, -40°C To +85°C, 5 Meter Drive Strength
DS99R105Serializer & DS99R106 Deserializer Chipset, 3-40 MHz, 0°C To +70°C, 10 Meter Drive Strength
Additional Resources
Design Tools


Connection Diagram


*click for larger image



Datasheet
RoHS Compliance Information Size in KbytesDate Click link below to Download
DS90C241/DS90C124 5-35MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer 1067
Kbytes
27-Aug-09 Download
DS90C241/DS90C124 5-35MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer (Japanese)
1156 Kbytes   Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.


Package Availability, Models, Samples & Pricing
Part NumberPackageFactory Lead TimeModelsSamples &
Electronic
Orders
Budgetary PricingStd
Pack
Size
Package
Marking
Format
TypePinsSpec.MSL
Rating
Peak
Reflow
RoHS
Report
CAD
Symbols
WeeksQtyQty$US each
SERDES24-35USBEvaluation Kit for DS90C241/DS90C124 FPD- Link II Embedded Clock LVDS Serializer and Deserializer ChipsetFull productionN/A
 
Buy Now
1+$250.001-
N/AN/A
DS90C124IVSTQFP48NOPB3260RoHS N/A Not recommended for new designs
(as of 15-Feb-08)

ds90c124ivs.ibs
 
Buy Now
1K+$6.00tray
of
250
NSUZXYTT
DS90C124
IVS
8 weeks1000
DS90C124QVSTQFP48NOPB3260RoHS N/A Full productionN/A
Samples
Buy Now
1K+$5.20tray
of
250
NSUZXYTT
DS90C124
QVS
6 weeks500
DS90C124IVSXTQFP48NOPB3260RoHS N/A Not recommended for new designs
(as of 15-Feb-08)
N/A
 
Buy Now
1K+$6.00reel
of
1000
NSUZXYTT
DS90C124
IVS
8 weeks2500
DS90C124QVSXTQFP48NOPB3260RoHS N/A Full productionN/A
 
Buy Now
1K+$5.20reel
of
1000
NSUZXYTT
DS90C124
QVS
6 weeks10000

General Description


The DS90C241/DS90C124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. It saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.

The DS90C241/DS90C124 incorporates LVDS signaling on the high-speed I/O. LVDS provides a low power and low noise environment for reliably transferring data over a serial transmission path. By optimizing the serializer output edge rate for the operating frequency range EMI is further reduced.

In addition the device features pre-emphasis to boost signals over longer distances using lossy cables. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects.

Reliability Metrics


Part Number Process EFR Reject EFR Sample Size PPM LTA Rejects LTA Device Hours FITS MTTF (Hours)
DS90C124IVSCMOS70184060010890004309006723
DS90C124IVSXCMOS70184060010890004309006723
DS90C124QVSCMOS70184060010890004309006723
DS90C124QVSXCMOS70184060010890004309006723

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.


Design Tools


TitleSize in Kbytes Date Click link below to Download    
LVDS Owner's Manual - 4th Edition     View    
Evaluation Kit for DS90C241/DS90C124 Serializer and Deserializer Chipset     View    

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Application Notes


TitleSize in Kbytes Date Click link below to Download
AN-1909: Application Note 1909 DS15BA101 and DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES 360
Kbytes
2-Mar-09 Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.

[Information as of 7-Nov-2009]