Features • 1– 4 Gbps low jitter operation • Fixed input equalization • Programmable output pre-emphasis • Independent switch and line side pre-emphasis controls • Programmable switch-side loopback mode • On-chip terminations • +3.3V supply • ESD rating HBM 6 kV • Lead-less LLP-48 package (7 mm x 7 mm) • 0°C to +85°C operating temperature range Description The DS40MB200 is a dual signal conditioning 2:1 multiplexer and 1:2 fan-out buffer designed for use in backplane redundancy applications. Signal conditioning features include input equalization and programmable output pre-emphasis that enable data communication in FR4 backplanes up to 4 Gbps. Each input stage has a fixed equalizer to reduce ISI distortion from board traces. All output drivers have 4 selectable steps of pre-emphasis to compensate for transmission losses from long FR4 backplanes and reduce deterministic jitter. The pre-emphasis levels can be independently controlled for the line-side and switch-side drivers. The internal loopback paths from switch-side input to switch-side output enable at-speed system testing. All receiver inputs are internally terminated with 100Ω differential terminating resistors. All drivers are internally terminated with 50Ω to VCC. Applications • Backplane or cable driver • Redundancy and signal conditioning applications • XAUI

Also Recommended DS42MB200▲ Dual 4.25 Gb/s 1:2 Mux/Buffer, Industrial Temperature Grade MY BRIEFCASE                                       Click any "Briefcase" icon to add an item

Typical Application *click for larger image	Block Diagram *click for larger image
Typical Performance *click for larger image

Datasheet

Title		Size	Date	Other Language
	DS40MB200 Dual 4.0 Gbps 2:1/1:2 CML Mux/Buffer with Transmit Pre-Emphasis and Receive Equalization	3128 Kbytes	25-Feb-09	日本語

Featured Application Notes

Title		Size	Date	Other Language
	AN-1399: Application Note 1399 Enabling Redundancy in Multi-Gigabit Links with DS40MB200 Mux/Buffer	1440 Kbytes	17-Oct-05	日本語 中文
	AN-1398: Application Note 1398 Printed Circuit Board Design Techniques for DS40MB200	1007 Kbytes	21-Oct-05	日本語 中文
	AN-1389: Application Note 1389 Setting Pre-Emphasis Level for DS40MB200 Dual 4Gb/s Mux/Buffer	1646 Kbytes	21-Oct-05	日本語 中文

More Application Notes

Title		Size	Date	Other Language
	AN-514: Application Note 514 Timing Analysis of Synchronous and Asynchronous Buses	153 Kbytes	2-Mar-99	日本語

Design Tools

Title	Size	Date
DS40MB200EVK User Guide	469 Kbytes	16-Apr-2008
DS40MB200 Design Resources	5 Kbytes	15-Oct-2007

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
DS40MB200SQ	BICMOS8	2	14113	142	0	1677500	3	475995205

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

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