DS25CP104A - 3.125 Gbps 4x4 LVDS Crosspoint Switch with Transmit Pre-Emphasis and Receive Equalization from the PowerWise® Family
Datasheet Packaging Samples & Pricing Eval. Boards Reliability Design Tools Application Notes Knowledge Base

Features
DC - 3.125 Gbps low jitter, low skew, low power operation
Pin and SMBus configurable, fully differential, non-blocking architecture
Pin (two levels) and SMBus (four levels) selectable pre-emphasis and equalization eliminate ISI jitter
Wide Input Common Mode Range enables easy interface to CML and LVPECL drivers
^LOS circuitry detects open inputs fault condition
On-chip 100Ω input and output termination minimizes insertion and return losses, reduces component count and minimizes board space. The DS25CP114 eliminates the on-chip input termination for added design flexibility.
8 kV ESD on LVDS I/O pins protects adjoining components
Small 6 mm x 6 mm LLP-40 space saving package

General Description


The DS25CP104A and DS25CP114 are 3.125 Gbps 4x4 LVDS crosspoint switches optimized for high-speed signal routing and switching over lossy FR-4 printed circuit board backplanes and balanced cables. More...


Applications


SD/HD/3G HD SDI Routers
OC-48 / STM-16
InfiniBand and FireWire
  Typical Application
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ParametersValues
Switch Size 4 x 4
Control Interface Pin or SMBus
Max Speed 3.125 Gbps
IN SigCon EQ
OUT SigCon Pre-E
Input Compatibility LVDS/LVPECL/CML
Output Compatibility LVDS
Power Consumption_ 518 mW
PowerWise Rating 4 41 mW/Gbps
Temperature Min -40 deg C
Temperature Max 85 deg C
SupplyVoltage 3.3 Volt
JTAG1149.1 No
Function Crosspoint
PowerWise Yes


Typical Performance


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  Also Recommended
DS10CP154A1.5 Gbps 4 X 4 Crosspoint
DS25CP1023.125 Gbps 2 X 2 Crosspoint
Additional Resources
Design Tools

Application Notes


Block Diagram


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Datasheet
RoHS Compliance Information Size in KbytesDate Click link below to Download
DS25CP104A / DS25CP114 3.125 Gbps 4x4 LVDS Crosspoint Switch with Transmit Pre-Emphasis and Receive Equalization 582
Kbytes
13-May-09 Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.


Package Availability, Models, Samples & Pricing
Part NumberPackageFactory Lead TimeModelsSamples &
Electronic
Orders
Budgetary PricingStd
Pack
Size
Package
Marking
Format
TypePinsSpec.MSL
Rating
Peak
Reflow
RoHS
Report
CAD
Symbols
WeeksQtyQty$US each
DS25CP104EVK

DS25CP104EVK Documentation
PreliminaryN/A
 
Buy Now
1+$195.001-
N/AN/A
DS25CP104ATSQLLP40NOPB3260RoHS N/A Full productionN/A
Samples
Buy Now
1K+$8.75reel
of
250
NS
UZXYTTE#
2CP104AS
6 weeksN/A
DS25CP104ATSQXLLP40NOPB3260RoHS N/A Full productionN/A
 
Buy Now
1K+$8.75reel
of
2500
NS
UZXYTTE#
2CP104AS
8 weeksN/A

General Description


The DS25CP104A and DS25CP114 are 3.125 Gbps 4x4 LVDS crosspoint switches optimized for high-speed signal routing and switching over lossy FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity. The non-blocking architecture allows connections of any input to any output or outputs. The switch configuration can be accomplished via external pins or the System Management Bus (SMBus) interface.

The DS25CP104A and DS25CP114 feature four levels (Off, Low, Medium, High) of transmit pre-emphasis (PE) and four levels (Off, Low, Medium, High) of receive equalization (EQ) settable via the SMBus interface. Off and Medium PE levels and Off and Low EQ levels are settable with the external pins. In addition, the SMBus circuitry enables the loss of signal ( ^LOS) monitors that can inform a system of the presence of an open inputs condition (e.g. disconnected cable).

Wide input common mode range allows the switch to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires a minimal space on the board while the flow-through pinout allows easy board layout. On the DS25CP104A each differential input and output is internally terminated with a 100Ω resistor to lower return losses, reduce component count and further minimize board space. For added design flexibility the 100Ω input terminations on the DS25CP114 have been eliminated. This enables a designer to build custom crosspoint configurations and distribution circuits that require a limited multidrop signaling topology.

Reliability Metrics


Part Number Process EFR Reject EFR Sample Size PPM LTA Rejects LTA Device Hours FITS MTTF (Hours)
DS25CP104ATSQBICMOS8B+01152007439005211083656
DS25CP104ATSQXBICMOS8B+01152007439005211083656

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.


Design Tools


TitleSize in Kbytes Date Click link below to Download    
DS25CP104 in 3G SDI Router Application 737 Kbytes 27-Aug-2008 View Online Download  

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Application Notes


TitleSize in Kbytes Date Click link below to Download
AN-1957: Application Note 1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter 1049
Kbytes
23-Apr-09 Download
AN-1898: Application Note 1898 LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces 308
Kbytes
4-Sep-08 Download

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More Application Notes


TitleSize in Kbytes Date Click link below to Download
AN-1971: Application Note 1971 Triple Rate SDI IP FPGA Resource Utilization on the SDXILEVK/AES-EXP-SDI-G Reference Design 195
Kbytes
6-May-09 Download

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[Information as of 8-Nov-2009]