Datasheet
RoHS Compliance Information
| Size in Kbytes | Date |
 |
| DS25CP102 3.125 Gbps 2X2 LVDS Crosspoint Switch with Transmit Pre-Emphasis and Receive Equalization |
398
Kbytes |
18-Mar-09 |
Download |
Package Availability, Models, Samples & Pricing
General Description
The DS25CP102 is a 3.125 Gbps 2x2 LVDS crosspoint switch optimized for high-speed signal routing and switching over lossy
FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal integrity
and noise immunity. The non-blocking architecture allows connections of any input to any output or outputs.
The DS25CP102 features two levels (Off and On) of transmit pre-emphasis (PE) and two levels (Off and On) of receive equalization
(EQ).
Wide input common mode range allows the switch to accept signals with LVDS, CML and LVPECL levels; the output levels are
LVDS. A very small package footprint requires a minimal space on the board while the flow-through pinout allows easy board
layout. Each differential input and output is internally terminated with a 100Ω resistor to lower device insertion and return
losses, reduce component count and further minimize board space.
Reliability Metrics
| Part Number |
Process |
EFR Reject |
EFR Sample Size |
PPM |
LTA Rejects |
LTA Device Hours |
FITS |
MTTF (Hours) |
|
DS25CP102TSQ | BICMOS8B+ | 0 | 1152 | 0 | 0 | 743900 | 5 | 211083656
|
|
DS25CP102TSQX | BICMOS8B+ | 0 | 1152 | 0 | 0 | 743900 | 5 | 211083656
|
Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR.
The Long Term Failure Rates were calculated
at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress
temperature of 150°C to an application temperature of 55°C.
For more information on Reliability Metrics, please click here.
Design Tools
| Title | Size in Kbytes |
Date |
|
|
|
| 3.125 Gbps 2x2 LVDS Crosspoint Switch Evaluation Board |
|
|
View |
|
|
Application Notes
| Title | Size in Kbytes |
Date |
|
| AN-1957: Application Note 1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter |
1049
Kbytes |
23-Apr-09 |
Download |
| AN-1898: Application Note 1898 LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces |
308
Kbytes |
4-Sep-08 |
Download |
More Application Notes
| Title | Size in Kbytes |
Date |
|
| AN-1971: Application Note 1971 Triple Rate SDI IP FPGA Resource Utilization on the SDXILEVK/AES-EXP-SDI-G Reference Design |
195
Kbytes |
6-May-09 |
Download |
[Information as of 7-Nov-2009]
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