Datasheet
Package Availability, Models, Samples & Pricing
General Description
The DS25BR440 is a 3.125 Gbps Quad LVDS buffer optimized for high-speed signal routing and repeating over lossy FR-4 printed
circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise
immunity.
The DS25BR440 features two levels of transmit pre-emphasis (PE) and two levels of receive equalization (EQ). Both of these
features compensate for interconnect losses and ultimately maximize noise margin. A loss-of-signal (
^LOS) circuit monitors each input channel and a unique
^LOS pin is asserted when no signal is detected at that input
Wide input common mode range allows the switch to accept signals with LVDS, CML and LVPECL levels; the output levels are
LVDS. A very small package footprint requires a minimal space on the board while the flow-through pinout allows easy board
layout. Each differential input and output is internally terminated with a 100Ω resistor to lower device return losses, reduce
component count and further minimize board space.
Reliability Metrics
| Part Number |
Process |
EFR Reject |
EFR Sample Size |
PPM |
LTA Rejects |
LTA Device Hours |
FITS |
MTTF (Hours) |
|
DS25BR440TSQ | BICMOS8B+ | 0 | 1152 | 0 | 0 | 743900 | 5 | 211083656
|
|
DS25BR440TSQX | BICMOS8B+ | 0 | 1152 | 0 | 0 | 743900 | 5 | 211083656
|
Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR.
The Long Term Failure Rates were calculated
at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress
temperature of 150°C to an application temperature of 55°C.
For more information on Reliability Metrics, please click here.
Application Notes
| Title | Size in Kbytes |
Date |
 |
| AN-1957: Application Note 1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter |
1049
Kbytes |
23-Apr-09 |
Download |
[Information as of 8-Nov-2009]
|
RoHS Compliance Information
