DS25BR440 - 3.125 Gbps Quad LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

Datasheet Packaging Samples & Pricing Models Knowledge Base

Features
•DC - 3.125 Gbps low jitter, low skew, low power operation
• Pin selectable transmit pre-emphasis and receive equalization eliminate data dependant jitter
•Wide input common mode voltage range allows DC-coupled interface to LVDS, CML and LVPECL drivers
• ^LOS circuitry detects open inputs fault
•Integrated 100Ω input and output terminations
•8 kV ESD on LVDS I/O pins protects adjoining components
•Small 6 mm x 6 mm LLP-40 space saving package

General Description

The DS25BR440 is a 3.125 Gbps Quad LVDS buffer optimized for high-speed signal routing and repeating over lossy FR-4 printed circuit board backplanes and balanced cables. More...


Applications

•Clock and data buffering and repeating
•Copper cable driving and equalization
•FR-4 equalization
•OC-48 / STM-16
  Typical Application
*click for larger image


Parametric Table     expand
Parametric Table    collapse
Channels 4 Channels
Max Speed 3.125 Gbps
IN SigCon EQ
OUT SigCon De-E
Input Compatibility LVDS/LVPECL/CML
Output Compatibility LVDS
Power Consumption_ 535 mW
PowerWise Rating 4 43 mW/Gbps
Special Features LOS
SupplyVoltage 3.3 Volt
Temperature Min -40 deg C
Temperature Max 85 deg C
Channels 4 Channels
Max Speed 3.125 Gbps
IN SigCon EQ
OUT SigCon De-E
Input Compatibility LVDS/LVPECL/CML
Output Compatibility LVDS
Power Consumption_ 535 mW
PowerWise Rating 4 43 mW/Gbps
Special Features LOS
SupplyVoltage 3.3 Volt
Temperature Min -40 deg C
Temperature Max 85 deg C
JTAG1149.1 No
Function Buffer
View Using Catalog


Typical Performance

*click for larger image

Equalization with 20 and 40 inch striplines
  Block Diagram
*click for larger image



Datasheet
RoHS Compliance Information Size in KbytesDate Click link below to Download
DS25BR440 3.125 Gbps Quad LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization 357 Kbytes 11-Feb-08 Download

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Package Availability, Models, Samples & Pricing
Part NumberPackageFactory Lead TimeModelsSamples &
Electronic
Orders		Budgetary PricingStd
Pack
Size		Package
Marking
Format
TypePinsSpec.MSL
Rating		Peak
Reflow		RoHS
Report		CAD
Symbols		WeeksQtyQty$US each
DS25BR440TSQLLP40NOPB3260RoHS N/A Full production
ds25br440.ibs		Samples
Buy Now 		1K+$5.45reel
of
250		NS
UZXYTT
2BR440SQ
6 weeksN/A
DS25BR440TSQXLLP40NOPB3260RoHS N/A Full production
ds25br440.ibs		 
Buy Now 		1K+$5.45reel
of
2500		NS
UZXYTT
2BR440SQ
8 weeksN/A

General Description

The DS25BR440 is a 3.125 Gbps Quad LVDS buffer optimized for high-speed signal routing and repeating over lossy FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity.

The DS25BR440 features two levels of transmit pre-emphasis (PE) and two levels of receive equalization (EQ). Both of these features compensate for interconnect losses and ultimately maximize noise margin. A loss-of-signal ( ^LOS) circuit monitors each input channel and a unique ^LOS pin is asserted when no signal is detected at that input

Wide input common mode range allows the switch to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires a minimal space on the board while the flow-through pinout allows easy board layout. Each differential input and output is internally terminated with a 100Ω resistor to lower device return losses, reduce component count and further minimize board space.

Application Notes

TitleSize in Kbytes Date Click link below to Download
AN-1957: Application Note 1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter 1049 Kbytes 23-Apr-09 Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.

[Information as of 5-Jul-2009]