Features • DC - 3.125 Gbps low jitter, high noise immunity, low power operation • Four levels of receive equalization reduce ISI jitter • On-chip 100Ω input and output termination minimizes insertion and return losses, reduces component count and minimizes board space • 7 kV ESD on LVDS I/O pins protects adjoining components • Small 3 mm x 3 mm 8-LLP space saving package Description The DS25BR110 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. A fully differential signal path ensures exceptional signal integrity and noise immunity. The DS25BR110 features four levels of receive equalization (EQ), making it ideal for use as a receiver device. Other LVDS devices with similar IO characteristics include the following products. The DS25BR120 features four levels of pre-emphasis for use as an optimized driver device, while the DS25BR100 features both pre-emphasis and equalization for use as an optimized repeater device. The DS25BR150 is a buffer/repeater with the lowest power consumption and does not feature transmit pre-emphasis nor receive equalization. Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count, and further minimize board space. Applications • Clock and data buffering • Metallic cable equalization • FR-4 equalization

Also Recommended DS25BR100▲ Offers Equalization And Pre-Emphasis DS25BR120▲ Offers Four Levels Of Pre-Emphasis DS25BR150▲ 3.125Gbps LVDS Buffer MY BRIEFCASE                                       Click any "Briefcase" icon to add an item

Typical Application click for larger image	Block Diagram click for larger image

Datasheet

Title		Size	Date	Other Language
	DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization	437 Kbytes	6-Nov-07	日本語

Featured Application Notes

Title		Size	Date	Other Language
	AN-1957: Application Note 1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter	1049 Kbytes	23-Apr-09
	AN-1898: Application Note 1898 LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces	308 Kbytes	4-Sep-08	中文

More Application Notes

Title		Size	Date	Other Language
	AN-1898: Application Note 1898 LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces	308 Kbytes	4-Sep-08	中文

Design Tools

Title	Size	Date
DS25BR100EVK Evaluation Board Design Documentation
Use the DS25BR100EVK to evaluate the DS25BR110	10 Kbytes	20-Nov-2009

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
DS25BR110TSD	BICMOS8B+	0	1152	0	0	743900	5	211083656
DS25BR110TSDX	BICMOS8B+	0	1152	0	0	743900	5	211083656

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

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