DP83816 - 10/100 Mb/s Integrated PCI Ethernet Media Access Controller and Physical Layer (MacPhyter-II)

	DP83816 - 10/100 Mb/s Integrated PCI Ethernet Media Access Controller and Physical Layer (MacPhyter-II)

Datasheet	Packaging	Samples & Pricing	Eval. Boards	Reliability	Design Tools	Models	Knowledge Base

Features

•	IEEE 802.3 Compliant, PCI V2.2 MAC/BIU supports traditional data rates of 10 Mb/s Ethernet and 100 Mb/s Fast Ethernet (via internal phy)
•	Bus master - burst sizes of up to 128 dwords (512 bytes)
•	BIU compliant with PC 97 and PC 98 Hardware Design Guides, PC 99 Hardware Design Guide draft, ACPI v1.0, PCI Power Management Specification v1.1, OnNow Device Class Power Management Reference Specification - Network Device Class v1.0a
•	Wake on LAN (WOL) support compliant with PC98, PC99, SecureOn, and OnNow, including directed packets, Magic Packetš, VLAN packets, ARP packets, pattern match packets, and Phy status change
•	Clkrun function for PCI Mobile Design Guide
•	Virtual LAN (VLAN) and long frame support
•	Support for IEEE 802.3x Full duplex flow control
•	Extremely flexible Rx packet filtration including: single address perfect filter with MSb masking, broadcast, 512 entry multicast/unicast hash table, deep packet pattern matching for up to 4 unique patterns
•	Statistics gathered for support of RFC 1213 (MIB II), RFC 1398 (Ether-like MIB), IEEE 802.3 LME, reducing CPU overhead for management
•	Internal 2 KB Transmit and 2 KB Receive data FIFOs
•	Serial EEPROM port with auto-load of configuration data from EEPROM at power-on
•	Flash/PROM interface for remote boot support
•	Fully integrated IEEE 802.3/802.3u 3.3V CMOS physical layer
•	IEEE 802.3 10BASE-T transceiver with integrated filters
•	IEEE 802.3u 100BASE-TX transceiver
•	Fully integrated ANSI X3.263 compliant TP-PMD physical sublayer with adaptive equalization and Baseline Wander compensation
•	IEEE 802.3u Auto-Negotiation - advertised features configurable via EEPROM
•	Full Duplex support for 10 and 100 Mb/s data rates
•	Single 25 MHz reference clock
•	144-pin LQFP and 160-pin LBGA packages
•	Low power 3.3V CMOS design with typical consumption of 561 mW operating, 380 mW during WOL mode, 33 mW sleep mode
•	IEEE 802.3u MII for connecting alternative external Physical Layer Devices

General Description

DP83816 is a single-chip 10/100 Mb/s Ethernet Controller for the PCI bus. More...

Typical Application

See Datasheet for Application Information

Parametric Table expand

Parametric Table collapse

Temperature Min	0 deg C
Temperature Max	70 deg C

Temperature Min	0 deg C
Temperature Max	70 deg C
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Additional Resources

Design Tools (see below)

Datasheet

RoHS Compliance Information	Size in Kbytes	Date
DP83816 10/100 Mb/s Integrated PCI Ethernet Media Access Controller and Physical Layer (MacPhyter-II)	818 Kbytes	3-Oct-05	View Online Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Package Availability, Models, Samples & Pricing

Part Number

Package

Factory Lead Time

Models

Samples &
Electronic
Orders

Budgetary Pricing

Std
Pack
Size

Package
Marking
Format

Type

Pins

Spec.

MSL
Rating

Peak
Reflow

RoHS
Report

CAD
Symbols

Weeks

Qty

$US each

DP83816-MAAP

10/100 Mb/s Integrated PCI Ethernet Media Access Controller and Physical Layer (MacPhyter-II)

Full production

N/A

$100.00

N/A

DP83816AVNG

LQFP

144

STD

NOPB

220

260

RoHS

Download

Full production

dp83816.ibs

1K+

$6.88

tray
of
60

NSUZXYYTTE#
DP83816AVNG

6 weeks

1000

General Description

DP83816 is a single-chip 10/100 Mb/s Ethernet Controller for the PCI bus. It is targeted at low-cost, high volume PC motherboards, adapter cards, and embedded systems. The DP83816 fully implements the V2.2 33 MHz PCI bus interface for host communications with power management support. Packet descriptors and data are transferred via bus-mastering, reducing the burden on the host CPU. The DP83816 can support full duplex 10/100 Mb/s transmission and reception, with minimum interframe gap.

The DP83816 device is an integration of an enhanced version of the National Semiconductor PCI MAC/BIU (Media Access Controller/Bus Interface Unit) and a 3.3V CMOS physical layer interface.

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM *	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
DP83816AVNG	CMOS9	1	4942	203	0	720500	5	204443842

Note: The Early Failure Rates were calculated as point estimates. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.

Design Tools

Title	Size in Kbytes	Date
DP83816 Design Resources			View

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Application Notes

Title	Size in Kbytes	Date
AN-1323: AN-1323 Updating DP83815 MacPHYTER Hardware Designs to DP83816 MacPHYTER-II	108 Kbytes	17-Mar-04	Download
AN-1323 (Chinese): AN-1323 Updating DP83815 MacPHYTER Hardware Designs to DP83816 MacPHYTER-II	260 Kbytes
AN-1351: AN-1351 MAC Address Programming for DP83816 MacPHYTER-II and DP83815 MacPHYTER	134 Kbytes	5-Jan-05	Download
AN-1351 (Chinese): AN-1351 MAC Address Programming for DP83816 MacPHYTER-II and DP83815 MacPHYTER	255 Kbytes
AN-1287: AN-1287 DP83815 MacPHYTER and DP83816 MacPHYTER-II High Data Rate Stress Testing	46 Kbytes	18-Jun-03	Download
AN-1287 (Chinese): AN-1287 DP83815 MacPHYTER and DP83816 MacPHYTER-II High Data Rate Stress Testing	237 Kbytes

If you have trouble printing or viewing PDF file(s), see Printing Problems.

[Information as of 21-Nov-2008]