ADC14DS105 - Dual 14-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs from the PowerWise® Family
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Features
Clock Duty Cycle Stabilizer
Single +3.0V or 3.3V supply operation
Serial LVDS Outputs
Serial Control Interface
Overrange outputs
60-pin LLP package, (9x9x0.8mm, 0.5mm pin-pitch)

Key Specification


For ADC14DS105A

Resolution

14 Bits

Conversion Rate

105 MSPS

SNR (fIN = 240 MHz)

70.5 dBFS (typ)

SFDR (fIN = 240 MHz)

83 dBFS (typ)

Full Power Bandwidth

1 GHz (typ)

Power Consumption

1 W (typ)

General Description


The ADC14DS105CISQ and ADC14DS105AISQ are high-performance CMOS analog-to-digital converters capable of converting two analog input signals into 14-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). More...


Applications


High IF Sampling Receivers
Wireless Base Station Receivers
Test and Measurement Equipment
Communications Instrumentation
Portable Instrumentation
  Typical Application
click for larger image

Application Circuit

ParametersValues
Resolution 14 bits
Channels 2 Channels
SNR 73 dB
SFDR 88 dB
ENOB 11.8 bits
Max Sample Rate 105 MSPS
Min Sample Rate 20 MSPS
Power Dissipation 1.06 Watt
PowerWise Rating 1 1.42 pJ/conv
INL (+/-) 1.5 LSB
SINAD 72.8 dB
DNL (+/-) 0.5 LSB
THD dB -86 dB
Min Supply Voltage 3 Volt
Max Supply Voltage 3.6 Volt
Nominal Vin 2 Vpp
Temperature Min -40 deg C
Temperature Max 85 deg C
Data Converter Type ADC
Automotive Yes
PowerWise Yes


Typical Performance


click for larger image

DNL
  Also Recommended
LMH6515DVGA
LMH6552Differential Amplifier, As Seen In ADC14DS105KARB Reference Design
LMK02000Low-jitter Clock Conditioner, As Seen In ADC14DS105KARB Reference Design
Additional Resources
Design Tools


Block Diagram


click for larger image

Block Diagram

Datasheet
RoHS Compliance Information Size in KbytesDate Click link below to Download
ADC14DS105 Dual 14-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs 604
Kbytes
12-Dec-07 Download
ADC14DS105 Dual 14-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs (Japanese)
865 Kbytes   Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.


Package Availability, Models, Samples & Pricing
Part NumberPackageFactory Lead TimeModelsSamples &
Electronic
Orders
Budgetary PricingStd
Pack
Size
Package
Marking
Format
TypePinsSpec.MSL
Rating
Peak
Reflow
RoHS
Report
CAD
Symbols
WeeksQtyQty$US each
ADC14DS105KARBADC14DS105KARB Evaluation BoardFull productionN/A
 
Buy Now
1+$800.001-
8 weeksN/A
ADC14DS105LFEBevaluation boardFull productionN/A
 
Buy Now
1+$495.001-
N/AN/A
ADC14DS105AISQELLP60NOPB3260RoHS Download Full productionN/A
 
Buy Now
1K+$67.00reel
of
250
NS
UZXYTTE#
14DS105A
8 weeksN/A
ADC14DS105CISQELLP60NOPB3260RoHS Download Full productionN/A
Samples
Buy Now
1K+$64.00reel
of
250
NS
UZXYTTE#
14DS105C
8 weeksN/A
ADC14DS105CISQLLP60NOPB
STD
3
3
260
260
RoHS Download Full productionN/A
Samples
Buy Now
1K+$64.00reel
of
2000
NS
UZXYTTE#
14DS105C
6 weeksN/A
ADC14DS105AISQLLP60NOPB3260RoHS Download Full productionN/A
Samples
Buy Now
1K+$67.00reel
of
2000
NS
UZXYTTE#
14DS105A
6 weeks50

General Description


The ADC14DS105CISQ and ADC14DS105AISQ are high-performance CMOS analog-to-digital converters capable of converting two analog input signals into 14-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). The digital outputs are serialized and provided on differential LVDS signal pairs. Both parts provide excellent performance, however, the ADC14DS105AISQ offers higher SFDR. These converters use a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. The ADC14DS105 may be operated from a single +3.0V or 3.3V power supply. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC14DS105 can be operated with an external 1.2V reference. The selectable duty cycle stabilizer maintains performance over a wide range of clock duty cycles. A serial interface allows access to the internal registers for full control of the ADC14DS105's functionality. The ADC14DS105 is available in a 60-lead LLP package and operates over the industrial temperature range of −40°C to +85°C.

Design Tools


TitleSize in Kbytes Date Click link below to Download    
Evaluation Boards & Development Systems     View    

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Reference Designs
RD-147 - Low IF Receiver Reference Design Board

Application Notes


TitleSize in Kbytes Date Click link below to Download
AN-1716: Application Note 1716 Driving the ADC14DS105 High-Speed A/D Converter for High Performance 80
Kbytes
20-Sep-07 Download
AN-1716 (Japanese): Application Note 1716 Driving the ADC14DS105 High-Speed A/D Converter for High Performance
98 Kbytes   Download
AN-1716 (Chinese): Application Note 1716 Driving the ADC14DS105 High-Speed A/D Converter for High Performance
237 Kbytes  

If you have trouble printing or viewing PDF file(s), see Printing Problems.

[Information as of 8-Nov-2009]