Features Total Ionizing Dose 100 krad(Si) Single Event Latch-up 120 MeV-cm 2/mg 1.1 GHz Full Power Bandwidth Internal sample-and-hold circuit Low power consumption Internal precision 1.0V reference Single-ended or Differential clock modes Data Ready output clock Clock Duty Cycle Stabilizer Dual +3.3V and +1.8V supply operation (+/- 10%) Power-down mode Offset binary or 2's complement output data format 48-pin Cer Quad package, (11.5mm x 11.5mm, 0.635mm pin-pitch) Description The ADC14155 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at rates up to 155 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.1 GHz. The ADC14155 operates from dual +3.3V and +1.8V power supplies and consumes 967 mW of power at 155 MSPS. The separate +1.8V supply for the digital output interface allows lower power operation with reduced noise. A power-down feature reduces the power consumption to 5 mW with the clock input disabled, while still allowing fast wake-up time to full operation. The differential inputs provide a full scale differential input swing equal to 2 times the reference voltage. A stable 1.0V internal voltage reference is provided, or the ADC14155 can be operated with an external reference. The ADC14155 can be configured for either single-ended or differential operation. Clock mode (differential versus single-ended) and output data format (offset binary versus 2's complement) are pin-selectable. A duty cycle stabilizer maintains performance over a wide range of clock duty cycles. The ADC14155 is available in a 48-lead thermally ehanced mult-layer ceramic quad package and operates over the military temperature range of -55°C to +125°C. Key Specification Resolution 14 Bits Conversion Rate 155 MSPS SNR (fIN = 70 MHz) 70.1 dBFS (typ) SFDR (fIN = 70 MHz) 82.3 dBFS (typ) ENOB (fIN = 70 MHz) 11.3 bits (typ) Full Power Bandwidth 1.1 GHz (typ) Power Consumption 967 mW (typ) Applications • High IF Sampling Receivers • Power Amplifier Linearization • Multi-carrier, Multi-mode Receivers • Test and Measurement Equipment • Communications Instrumentation • Radar Systems

Also Recommended ADC08D1520QML Space Qualified 8-bit Single Channel 3 GSPS Or Dual Channel 1.5 GSPS ADC ADC10D1000QML Space Qualified 10-bit Single Channel 2 GSPS Or Dual Channel 1 GSPS ADC MY BRIEFCASE                                       Click any "Briefcase" icon to add an item

	Block Diagram click for larger image
Typical Performance click for larger image

Datasheet

Title		Size	Date	Other Language
	ADC14155QML 14-Bit, 155 MSPS, 1.1 GHz Bandwidth A/D Converter	1220 Kbytes	12-Nov-09

Featured Application Notes

Title		Size	Date	Other Language
	AN-1721: Application Note 1721 High Speed ADCs with Interfacing, Driving and Clocking Schemes	186 Kbytes	20-Sep-07	日本語 中文

More Application Notes

Title		Size	Date	Other Language
	AN-1261: Application Note 1261 Power Supply Effects on Noise Performance	78 Kbytes	16-Mar-07	中文