Features • Choice of Binary or 2’s complement output format • Single +3.3V Supply Operation • Outputs 2.4V to 3.3V Compatible • Pin Compatible with ADC12D040 • Power Down Mode • Internal/External Reference Description The ADC12DL066 is a dual, low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 66 Megasamples per second (Msps), minimum. This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance and a 450 MHz Full Power Bandwidth. Operating on a single 3.3V power supply, the ADC12DL066 achieves 10.7 effective bits and consumes just 686 mW at 66 Msps, including the reference current. The Power Down feature reduces power consumption to 75 mW. The differential inputs provide a full scale differential input swing equal to 2 times VREF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. The digital outputs from the two ADCs are available on separate 12-bit buses with an output data format choice of offset binary or two’s complement. To ease interfacing to lower voltage systems, the digital output driver power pins of the ADC12DL066 can be connected to a separate supply voltage in the range of 2.4V to the digital supply voltage. This device is available in the 64-lead TQFP package and will operate over the industrial temperature range of −40°C to +85°C. An evaluation board is available to ease the evaluation process. Key Specification Resolution 12 Bits DNL ±0.5 LSB (typ) SNR (fIN = 10 MHz) 66 dB (typ) SFDR (fIN = 10 MHz) 81 dB (typ) Data Latency 6 Clock Cycles Power Consumption Operating 686 mW (typ) Power Down Mode 75 mW (typ) Applications • Ultrasound and Imaging • Instrumentation • Communications Receivers • Sonar/Radar • xDSL • Cable Modems • DSP Front Ends

Also Recommended ADC12DL040▲ 40 Msps At 210 MW Power ADC12DL065▲ 65 Msps At 360 MW Power ADC12DL080▲ 80 Msps At 447 MW Power LMH6552 For Analog Input Amplifier MY BRIEFCASE                                       Click any "Briefcase" icon to add an item

	Block Diagram click for larger image
Typical Performance click for larger image

Datasheet

Title		Size	Date	Other Language
	ADC12DL066 Dual 12-Bit, 66 Msps, 450 MHz Input Bandwidth A/D Converter w/Internal Reference	509 Kbytes	1-Feb-08	日本語

Featured Application Notes

Title		Size	Date	Other Language
	AN-769: Dynamic Specifications for Sampling A/D Converters	128 Kbytes	5-Aug-95

More Application Notes

Title		Size	Date	Other Language
	AN-1261: Application Note 1261 Power Supply Effects on Noise Performance	78 Kbytes	16-Mar-07	中文

Design Tools

Title	Size	Date
Evaluation Boards & Development Systems

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
ADC12DL066CIVS	CMOS7	0	18406	0	0	1089000	4	309006723

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

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