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Features
| | 1.1 GHz Full Power Bandwidth |
| | Internal sample-and-hold circuit |
| | Low power consumption |
| | Internal precision 1.0V reference |
| | Single-ended or Differential clock modes |
| | Clock Duty Cycle Stabilizer |
| | Dual +3.3V and +1.8V supply operation |
| | Power-down and Sleep modes |
| | Offset binary or 2's complement output data format |
| | Pin-compatible: ADC14155, ADC12C170, ADC11C170 |
| | 48-pin LLP package, (7x7x0.8mm, 0.5mm pin-pitch) |
Description The ADC11C125 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 11-Bit
digital words at rates up to 125 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture
with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component
count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.1
GHz. The ADC11C125 operates from dual +3.3V and +1.8V power supplies and consumes 608 mW of power at 125 MSPS.
The separate +1.8V supply for the digital output interface allows lower power operation with reduced noise. A power-down feature
reduces the power consumption to 5 mW while still allowing fast wake-up time to full operation. In addition there is a sleep
feature which consumes 50 mW of power and has a faster wake-up time.
The differential inputs provide a full scale differential input swing equal to 2 times the reference voltage. A stable 1.0V
internal voltage reference is provided, or the ADC11C125 can be operated with an external reference.
Clock mode (differential versus single-ended) and output data format (offset binary versus 2's complement) are pin-selectable.
A duty cycle stabilizer maintains performance over a wide range of input clock duty cycles.
The ADC11C125 is pin compatible with the ADC12C170 and the ADC14155.
It is available in a 48-lead LLP package and operates over the industrial temperature range of −40°C to +85°C.
Key Specification
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Resolution
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11 Bits
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Conversion Rate
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125 MSPS
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SNR (fIN = 70 MHz)
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65.5 dBFS (typ)
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SFDR (fIN = 70 MHz)
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88.2 dBFS (typ)
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ENOB (fIN = 70 MHz)
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10.5 bits (typ)
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Full Power Bandwidth
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1.1 GHz (typ)
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Power Consumption
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608 mW (typ)
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Applications
| | High IF Sampling Receivers |
| | Wireless Base Station Receivers |
| | Power Amplifier Linearization |
| | Multi-carrier, Multi-mode Receivers |
| | Test and Measurement Equipment |
| | Communications Instrumentation |
| | Radar Systems |
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Application Circuit
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| Parameters | Values |
| Resolution |
11 bits |
| Channels |
1 Channels |
| SNR |
65.5 dB |
| SFDR |
88.2 dB |
| ENOB |
10.5 bits |
| Max Sample Rate |
125 MSPS |
| Min Sample Rate |
5 MSPS |
| Power Dissipation |
0.608 Watt |
| PowerWise Rating 1 |
83.97 pJ/conv |
| INL (+/-) |
0.25 LSB |
| SINAD |
65.5 dB |
| DNL (+/-) |
0.2 LSB |
| THD dB |
-85.7 dB |
| Min Supply Voltage |
3 Volt |
| Max Supply Voltage |
3.6 Volt |
| Nominal Vin |
2 Vpp |
| Temperature Min |
-45 deg C |
| Temperature Max |
85 deg C |
| Data Converter Type |
ADC |
| PowerWise |
No |
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Datasheet
Featured Application Notes
More Application Notes
Part Number(s) (NSID) | Top View | Availability | Current Reported Stock | Budgetary Pricing | Standard Pack Size |
ADC11C125CISQ/NOPB
RoHS | | Full production Lead Time: 12 weeks
| | Distributor | Region | Qty |
| DIGIKEY |  | Worldwide | 0 |
| $31.00 each at 1K+ pcs | reel of 250 |
Part Number(s) (NSID) | Description | Availability | Current Reported Stock | Budgetary Pricing | Standard Pack Size |
ADC11C125HFEB
| 11-Bit, 125 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS outputs | Full production Lead Free (RoHS)
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| $495.00 each | 1 |
| Description:
This Design Kit is designed to ease evaluation and design-in of National Semiconductor's ADC11C125 11-bit Analog-to-Digital Converter, which operates at speeds up 125 Msps.
The evaluation board can be used in either of two modes. In the Manual mode, suitable test equipment can be used with the board to evaluate the ADC11C125 performance. In the Computer mode, evaluation is simplified by connecting the board to the WaveVision 4.4 Data Capture Board (order number WAVEVSN BRD 4.4), which is connected to a personal computer through a USB port and running WaveVision software, operating under Microsoft Windows. The software can perform an FFT on the captured data upon command and, in addition to a frequency domain plot, shows dynamic performance in the form of SNR, SINAD, THD, SFDR and ENOB. For analog input frequencies below 150 MHz, use the ADC11C125LFEB.
Features:
- Board comes fully assembled and tested
- Single (+5V) supply needed
- All ADC features can be exercised
Contents:
|
Part Number(s) (NSID) | Description | Availability | Current Reported Stock | Budgetary Pricing | Standard Pack Size |
ADC11C125LFEB
| 11-Bit, 125 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS outputs | Full production Lead Free (RoHS)
|
| $495.00 each | 1 |
| Description:
This Design Kit is designed to ease evaluation and design-in of National Semiconductor's ADC11C125 11-bit Analog-to-Digital Converter, which operates at speeds up 125 Msps.
The evaluation board can be used in either of two modes. In the Manual mode, suitable test equipment can be used with the board to evaluate the ADC11C125 performance. In the Computer mode, evaluation is simplified by connecting the board to the WaveVision 4.4 Data Capture Board (order number WAVEVSN BRD 4.4), which is connected to a personal computer through a USB port and running WaveVision software, operating under Microsoft Windows. The software can perform an FFT on the captured data upon command and, in addition to a frequency domain plot, shows dynamic performance in the form of SNR, SINAD, THD, SFDR and ENOB. For analog input frequencies above 150 MHz, use the ADC11C125HFEB
Features:
- Board comes fully assembled and tested
- Single (+5V) supply needed
- All ADC features can be exercised
Contents:
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