ADC08D1000 - High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter from the PowerWise® Family

Datasheet Packaging Samples & Pricing Eval. Boards Reliability Design Tools Models Knowledge Base

Features
Internal Sample-and-Hold
Single +1.9V ±0.1V Operation
Choice of SDR or DDR output clocking
Interleave Mode for 2x Sampling Rate
Multiple ADC Synchronization Capability
Guaranteed No Missing Codes
Serial Interface for Extended Control
Fine Adjustment of Input Full-Scale Range and Offset
Duty Cycle Corrected Sample Clock

Key Specification


Resolution

8 Bits

Max Conversion Rate

1 GSPS (min)

Bit Error Rate

10 -18 (typ)

ENOB @ 500 MHz Input

7.4 Bits (typ)

DNL

±0.15 LSB (typ)

Power Consumption

Operating

1.6 W (typ)

Power Down Mode

3.5 mW (typ)

General Description


The ADC08D1000 is a dual, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 1.3 GSPS. More...


Applications


Direct RF Down Conversion
Digital Oscilloscopes
Satellite Set-top boxes
Communications Systems
Test Instrumentation
  Typical Application
See Datasheet for Application Information

Parametric Table     expand
Parametric Table    collapse
Resolution 8 bit
Channels 2 Channels
SNR 47.1 dB
SFDR 55 dB
ENOB 7.4 bit
Max Sample Rate 1000 MSPS
Min Sample Rate 200 MSPS
Power Dissipation 1.6 Watt
PowerWise Rating 1 4.74 pJ/conv
Resolution 8 bit
Channels 2 Channels
SNR 47.1 dB
SFDR 55 dB
ENOB 7.4 bit
Max Sample Rate 1000 MSPS
Min Sample Rate 200 MSPS
Power Dissipation 1.6 Watt
PowerWise Rating 1 4.74 pJ/conv
DNL (+/-) 0.15 LSB
INL (+/-) 0.3 LSB
SINAD 46.3 dB
THD dB -55 dB
Min Supply Voltage 1.8 Volt
Max Supply Voltage 2 Volt
Nominal Vin 0.7 Vpp
Temperature Min -40 deg C
Temperature Max 85 deg C
Data Converter Type ADC
Automotive Selection Guide Yes
PowerWise Yes
View Using Catalog


Typical Performance


*click for larger image


  Also Recommended
ADC081000For A Single Version
ADC08D1500For A 1.5 Gsps Version
ADC08D500For A 500 Msps Version
LMH6555For Analog Input Amplifier / Single-Ended To Differential Conversion

Additional Resources


Design Tools (see below)


Block Diagram


click for larger image



Datasheet
RoHS Compliance Information Size in KbytesDate Click link below to View Online Click link below to Download Click link below to Receive via Email
ADC08D1000 High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter 1280 Kbytes 20-Mar-08 View Online Download Receive via Email
ADC08D1000 High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter (Japanese)
1341 Kbytes   View Online Download Receive via Email
ADC08D1000QML High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter 1310 Kbytes 9-May-07 View Online Download Receive via Email

If you have trouble printing or viewing PDF file(s), see Printing Problems.


Package Availability, Models, Samples & Pricing
Part NumberPackageFactory Lead TimeModelsSamples &
Electronic
Orders
Budgetary PricingStd
Pack
Size
Package
Marking
Format
TypePinsSpec.MSL
Rating
Peak
Reflow
RoHS
Report
CAD
Symbols
WeeksQtyQty$US each
ADC08D1000DEVHigh Performance, Low Power, Dual 8-Bit, 1 GSPS A/D ConverterFull productionN/A
 
Buy Now
1+$3500.001-
8 weeksN/A
ADC08D1000EVALHigh Performance, Low Power, Dual 8-Bit, 1 GSPS A/D ConverterFull productionN/A
 1+$2400.001-
8 weeksN/A
ADC08D1000CIYBLQFP EXP PAD128STD
NOPB
3
3
260
260
RoHS Download Full production
adc08d1000.ibs
 
Buy Now
25+$304.00tray
of
60
NSUZXYYTTE#
ADC08D1000
CIYB
6 weeks100
ADC08D1000WG-QVCQGP128STD1260RoHS Download Full productionN/A
  CALLtray
of
N/A
NSZSSXXYYA
ADC08D1000
WG-QV 5962-
0520601VZC Q
N/AN/A
ADC08D1000WGFQVCQGP128STD1260RoHS Download Full productionN/A
  CALLtray
of
N/A
NSZSSXXYYA
ADC08D1000
WGFQV 5962F
0520601VZC Q
N/AN/A

General Description


The ADC08D1000 is a dual, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 1.3 GSPS. Consuming a typical 1.6 Watts at 1 GSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.4 ENOB with a 500 MHz input signal and a 1 GHz sample rate while providing a 10 -18 B.E.R. Output formatting is offset binary and the LVDS digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.2V.

Each converter has a 1:2 demultiplexer that feeds two LVDS buses and reduces the output data rate on each bus to half the sampling rate. The two converters can be interleaved and used as a single 2 GSPS ADC.

The converter typically consumes less than 3.5 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad LQFP and operates over the Industrial (-40°C TA +85°C) temperature range.

Reliability Metrics


Part Number Process Early Failure Rate - Rejects Sample Size (EFR) PPM * Rel. Rejects Device Hours Long Term Failure Rates (FITS) MTTF
ADC08D1000CIYBCMOS91323229204955008140599477
ADC08D1000WG-QVCMOS91323229204955008140599477
ADC08D1000WGFQVCMOS91323229204955008140599477

For more information on Reliability Metrics, please click here.


Design Tools


TitleSize in Kbytes Date Click link below to View Online Click link below to Download Click link below to Receive via Email
Evaluation Systems 17 Kbytes 29-May-2008 View    
National GHz ADC Development Platform for Xilinx FPGAs 6 Kbytes 5-Feb-2008 View    

If you have trouble printing or viewing PDF file(s), see Printing Problems.

[Information as of 8-Aug-2008]