Features • Single +3.3V supply operation • Internal sample-and-hold • Internal reference • Outputs 2.4V to 3.6V compatible • Duty Cycle Stabilizer • Power down mode Description The ADC14L040 is a low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at 40 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption while providing excellent dynamic performance and a 150 MHz Full Power Bandwidth. Operating on a single +3.3V power supply, the ADC14L040 achieves 11.9 effective bits at nyquist and consumes just 235 mW at 40 MSPS . The Power Down feature reduces power consumption to 15 mW. The differential inputs provide a full scale differential input swing equal to 2 times VREF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. Duty cycle stabilization and output data format are selectable using a quad state function pin. The output data can be set for offset binary or two's complement. To ease interfacing to lower voltage systems, the digital output driver power pins of the ADC14L040 can be connected to a separate supply voltage in the range of 2.4V to the analog supply voltage. This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of -40°C to +85°C. An evaluation board is available to ease the evaluation process. Key Specification Resolution 14 Bits DNL ±0.5 LSB (typ) SNR (fIN = 10 MHz) 74 dB (typ) SFDR (fIN = 10 MHz) 90 dB (typ) Data Latency 7 Clock Cycles Power Consumption   -- Operating 235 mW (typ) -- Power Down Mode 15 mW (typ) Applications • Medical Imaging • Instrumentation • Communications • Digital Video

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	Block Diagram click for larger image
Typical Performance click for larger image

Datasheet

Title		Size	Date	Other Language
	ADC14L040 14-Bit, 40 MSPS, 235 mW A/D Converter	915 Kbytes	4-Apr-06	日本語

Featured Application Notes

Title		Size	Date	Other Language
	AN-1716: Application Note 1716 Driving the ADC14DS105 High-Speed A/D Converter for High Performance	80 Kbytes	20-Sep-07	日本語 中文

More Application Notes

Title		Size	Date	Other Language
	AN-1261: Application Note 1261 Power Supply Effects on Noise Performance	78 Kbytes	16-Mar-07	中文

Design Tools

Title	Size	Date
Evaluation Boards & Development Systems

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
ADC14L040CIVY	CMOS9	1	7327	137	0	1103000	4	312979261

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

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