Features • Binary or 2's complement output format • Single supply operation • Internal sample-and-hold • Outputs 2.4V to 5V compatible • Power down mode • Pin-compatible with ADC12DL066 • Internal/External Reference Description The ADC12D040 is a dual, low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 40 Megasamples per second (Msps), minimum. This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. Operating on a single 5V power supply, the ADC12D040 achieves 10.9 effective bits at 10 MHz input and consumes just 600 mW at 40 Msps, including the reference current. The Power Down feature reduces power consumption to 75 mW. The differential inputs provide a full scale differential input swing equal to 2VREF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. The digital outputs for the two ADCs are available on separate 12-bit buses with an output data format choice of offset binary or 2's complement. For ease of interface, the digital output driver power pins of the ADC12D040 can be connected to a separate supply voltage in the range of 2.4V to the digital supply voltage, making the outputs compatible with low voltage systems. The ADC12D040's speed, resolution and single supply operation make it well suited for a variety of applications. This device is available in the 64-lead TQFP package and will operate over the industrial temperature range of -40°C to +85°C. An evaluation board is available to facilitate the product evaluation process Key Specification SNR (fIN = 10 MHz) 68 dB (typ) ENOB (fIN = 10 MHz) 10.9 bits (typ) SFDR (fIN = 10 MHz) 80 dB (typ) Data Latency 6 Clock Cycles Supply Voltage +5V ±5% Power Consumption, Operating   Operating 600 mW (typ) Power Down Mode 75 mW (typ) Applications • Ultrasound and Imaging • Instrumentation • Communications Receivers • Sonar/Radar • xDSL • Cable Modems

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Typical Application click for larger image	Block Diagram click for larger image
Typical Performance click for larger image

Datasheet

Title		Size	Date	Other Language
	ADC12D040 Dual 12-Bit, 40 MSPS, 600 mW A/D Converter with Internal/External Reference	995 Kbytes	9-Dec-05	日本語

Featured Application Notes

Title		Size	Date	Other Language
	AN-769: Dynamic Specifications for Sampling A/D Converters	128 Kbytes	5-Aug-95

More Application Notes

Title		Size	Date	Other Language
	AN-1261: Application Note 1261 Power Supply Effects on Noise Performance	78 Kbytes	16-Mar-07	中文

Design Tools

Title	Size	Date
Evaluation Boards & Development Systems

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
ADC12D040CIVS	CMOS7	0	18406	0	0	1089000	4	309006723
ADC12D040CIVSX	CMOS7	0	18406	0	0	1089000	4	309006723

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

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