Datasheet
RoHS Compliance Information
| Size in Kbytes | Date |
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| ADC12C080 12-Bit, 65/80 MSPS A/D Converter |
455
Kbytes |
30-Aug-07 |
Download |
ADC12C080 12-Bit, 65/80 MSPS A/D Converter (Japanese)
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584 Kbytes |
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Package Availability, Models, Samples & Pricing
General Description
The ADC12C080 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 12-bit
digital words at rates up to 80 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture
with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component
count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1 GHz.
The ADC12C080 may be operated from a single +3.0V power supply and consumes low power. A separate +2.5V supply may be used
for the digital output interface which allows lower power operation with reduced noise. A power-down feature reduces the power
consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a
2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC12C080 can be operated
with an external 1.2V reference. Output data format (offset binary versus 2's complement) and duty cycle stabilizer are pin-selectable.
The duty cycle stabilizer maintains performance over a wide range of clock duty cycles.
The ADC12C080 is available in a 32-lead LLP package and operates over the industrial temperature range of −40°C to +85°C.
Design Tools
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[Information as of 8-Nov-2009]
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