Features • Single +1.9V ±0.1V Operation • Choice of SDR or DDR output clocking • Internal selectable 4K Data Buffer • Serial Interface for Extended Control • Adjustment of Input Full-Scale Range, Offset and Clock Phase • Duty Cycle Corrected Sample Clock • Test Pattern Output Capability Description The ADC08B3000 is a single, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sample rates up to 3.4 Gigasamples Per Second, (Gsps). Consuming a typical 1.6 Watts at 3 Gsps from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the calibration scheme enable an excellent response of all dynamic parameters up to Nyquist, producing a high 7.1 Effective Number Of Bits, (ENOB), with a 748 MHz input signal and a 3 GHz sample rate while providing a 10 -18 Code Error Rate. A sample rate of 3 Gsps is achieved by interleaving two ADCs, each operating at 1.5 Gsps. Output formatting is offset binary. The device contains a 4K Capture Buffer with output on two 8-bit Low Voltage CMOS (LVCMOS) output buses at rates up to 200MHz. The converter typically consumes less than 25 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad LQFP and operates over the Industrial (-40°C ≤ TA ≤ +85°C) temperature range. Key Specification Resolution 8 Bits Max Conversion Rate 3 Gsps (min) Code Error Rate 10 -18 (typ) ENOB @ 748 MHz Input 7.1 Bits (typ) SNR @ 748 MHz 44.9 dB (typ) Full Power Bandwidth 3 GHz (typ) Power Consumption Full Power Capture 1.6 W (typ) Power Down Mode 25 mW (typ) Applications • Distance Ranging • Test and Measurement

Also Recommended ADC083000▲ For 3.0 Gsps Without An Integrated Buffer ADC08D1500▲ For Dual 1.5 Gsps LMH6555 For Analog Input Amplifier / Single-Ended To Differential Conversion LMX2531LQ1500E For Matching Clock Conditioner DC Coupled Analog Input MY BRIEFCASE                                       Click any "Briefcase" icon to add an item

Typical Application *click for larger image DC Coupled Analog Input	Block Diagram *click for larger image
Typical Performance *click for larger image ENOB vs. INPUT FREQUENCY

Datasheet

Title		Size	Date	Other Language
	ADC08B3000 8-Bit, 3 GSPS, High Performance, Low Power A/D Converter with 4K Buffer	1358 Kbytes	6-Jul-09	日本語

Featured Application Notes

Title		Size	Date	Other Language
	AN-1727: Application Note 1727 Calibrating the ADC08xxxx Family of Ultra High-Speed Converters	72 Kbytes	6-Mar-08	日本語 中文

More Application Notes

Title		Size	Date	Other Language
	AN-281: AN-281 Data Acquisition Using INS8048	129 Kbytes	4-Oct-04

Design Tools

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Evaluation Boards & Development Systems

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
ADC08B3000CIYB	CMOS9	1	7327	137	0	1103000	4	312979261

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

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