Features • Single-ended input • Selectable capture buffer size • PLL for clock multiplication • Reference Ladder Top and Bottom accessible • Linear power scaling with sample rate • FPGA training pattern • AEC-Q100 Grade 2 Qualified • Power-down feature Description The ADC08B200 is a high speed analog-to-digital converter (ADC) with an integrated capture buffer. The 8-bit, 200 MSPS A/D core is based upon the proven ADC08200 with integrated track-and-hold and is optimized for low power consumption. This device contains a selectable size capture buffer of up to 1,024 bytes that allows fast capture of an input signal with a slower readout rate. An on-chip clock PLL circuit provides the option of on-chip clock rate multiplication to provide the high speed sampling clock. The ADC08B200 is resistant to latch-up and the outputs are short-circuit proof. The top and bottom of the ADC08B200's reference ladder are available for connections, enabling a wide range of input possibilities. The digital outputs are TTL/CMOS compatible with a separate output power supply pin to support interfacing with 2.7V to 3.3V logic. The digital inputs and outputs are low voltage TTL/CMOS compatible and the output data format is straight binary. The ADC08B200Q runs on an Automotive Grade Flow and is AEC-Q100 Grade 2 Qualified. The ADC08B200 is offered in a 48-pin plastic package (TQFP) and is specified over the extended industrial temperature range of −40°C to +105°C. An evaluation board is available to assist in the easy evaluation of the ADC08B200. Key Specification  (PLL Bypassed) Resolution 8 Bits Maximum sampling frequency 200 MSPS (min) DNL ±0.4 LSB (typ) ENOB (fIN= 49 MHz) 7.2 bits (typ) THD (fIN= 49 MHz) −53 dBc (typ) Power Consumption Operating, 50 MHz Input 2 mW / Msps (typ) Power Down 2.15 mW (typ) Applications • Laser Ranging • RADAR • Pulse Capturing

Also Recommended ADC08060▲ For 60 Msps ADC08100▲ For 100 Msps ADC08200▲ Non-Buffered Version ADC08500 For Faster Sample Rate ADC08L060▲ For Low Power 60 Msps Typical Application MY BRIEFCASE                                       Click any "Briefcase" icon to add an item

Typical Application *click for larger image Typical Application	Block Diagram click for larger image Pin Configuration
Typical Performance *click for larger image 49MHz Input Spectral Plot

Datasheet

Title		Size	Date	Other Language
	ADC08B200 / ADC08B200Q 8-Bit, 200 MSPS A/D Converter with Capture Buffer	639 Kbytes	20-Oct-09	日本語

Featured Application Notes

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Design Tools

Title	Size	Date
Evaluation Boards & Development Systems

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
ADC08B200CIVS	CMOS7	0	18406	0	0	1089000	4	309006723
ADC08B200QCIVS	CMOS7	0	18406	0	0	1089000	4	309006723

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

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