ADC081000 - High Performance, Low Power 8-Bit, 1 GSPS A/D Converter from the PowerWise® Family
Datasheet Packaging Samples & Pricing Reliability Design Tools Models Knowledge Base

Features
Internal Sample-and-Hold
Single +1.9V ±0.1V Operation
Adjustable Output Levels
Guaranteed No Missing Codes
Low Power Standby Mode

Key Specification


Resolution

8 Bits

Max Conversion Rate

1 GSPS (min)

ENOB @ 500 MHz Input

7.5 Bits (typ)

DNL

±0.25 LSB (typ)

Conversion Latency

7 and 8 Clock Cycles

Power Consumption

Operating

1.45 W (typ)

Power Down Mode

9 mW (typ)

General Description


The ADC081000 is a low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 1.6 GSPS. More...


Applications


Direct RF Down Conversion
Digital Oscilloscopes
Satellite Set-top boxes
Communications Systems
Test Instrumentation
  Typical Application
*click for larger image

Servoing Analog Input

ParametersValues
Resolution 8 bits
Channels 1 Channels
SNR 48 dB
SFDR 58.5 dB
ENOB 7.5 bits
Max Sample Rate 1000 MSPS
Min Sample Rate 200 MSPS
Power Dissipation 1.43 Watt
PowerWise Rating 1 7.90 pJ/conv
DNL (+/-) 0.25 LSB
INL (+/-) 0.35 LSB
SINAD 47 dB
THD dB -57 dB
Min Supply Voltage 1.8 Volt
Max Supply Voltage 2 Volt
Nominal Vin 0.8 Vpp
Temperature Min -40 deg C
Temperature Max 85 deg C
Data Converter Type ADC
Automotive No
PowerWise Yes


Typical Performance


*click for larger image


  Also Recommended
ADC081500For A Faster, Lower Power Version
ADC083000For Single Device Faster Sample Rate (3.0 Gsps)
ADC08500For Lower Sample Rate (500 Msps)
ADC08D1000For A Dual Version
LMH6555For Analog Input Amplifier / Single-Ended To Differential Conversion
LMX2531LQ2080EFor Clock Generation
Additional Resources
Online Seminars Design Tools


Block Diagram


click for larger image



Datasheet
RoHS Compliance Information Size in KbytesDate Click link below to Download
ADC081000 High Performance, Low Power 8-Bit, 1 GSPS A/D Converter 580
Kbytes
21-Apr-09 Download
ADC081000 High Performance, Low Power 8-Bit, 1 GSPS A/D Converter (Japanese)
1198 Kbytes   Download

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Package Availability, Models, Samples & Pricing
Part NumberPackageFactory Lead TimeModelsSamples &
Electronic
Orders
Budgetary PricingStd
Pack
Size
Package
Marking
Format
TypePinsSpec.MSL
Rating
Peak
Reflow
RoHS
Report
CAD
Symbols
WeeksQtyQty$US each
ADC081000CIYBLQFP EXP PAD128NOPB
STD
3
3
260
260
RoHS Download Full production
adc081000.ibs
 
Buy Now
25+$139.00tray
of
60
NSUZXYYTTE#
ADC081000
CIYB
6 weeks50

General Description


The ADC081000 is a low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 1.6 GSPS. Consuming a typical 1.4 Watts at 1 GSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.5 ENOB with a 500 MHz input signal and a 1 GHz sample rate while providing a 10 -18 B.E.R. Output formatting is offset binary and the LVDS digital outputs are compliant with IEEE 1596.3-1996, with the exception of a reduced common mode voltage of 0.8V.

The converter has a 1:2 demultiplexer that feeds two LVDS buses, reducing the output data rate on each bus to half the sampling rate. The data on these buses are interleaved in time to provide a 500 MHz output rate per bus and a combined output rate of 1 GSPS.

The converter typically consumes less than 10 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad LQFP and operates over the industrial (-40°C TA +85°C) temperature range.

Reliability Metrics


Part Number Process EFR Reject EFR Sample Size PPM LTA Rejects LTA Device Hours FITS MTTF (Hours)
ADC081000CIYBCMOS917327137011030004312979261

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.


Design Tools


TitleSize in Kbytes Date Click link below to Download    
National GHz ADC Development Platform for Xilinx FPGAs     View    

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Application Notes


TitleSize in Kbytes Date Click link below to Download
AN-1615: Application Note 1615 LMH6555 Evaluation Board 1307
Kbytes
22-Jun-07 Download
AN-1615 (Japanese): Application Note 1615 LMH6555 Evaluation Board
1286 Kbytes   Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.

[Information as of 7-Nov-2009]