RoHS Compliance Information	Size in Kbytes	Date
LMX3161 Single Chip Radio Transceiver	212 Kbytes	22-Nov-99	Download

Obsolete Versions

General Description

The LMX3161 Single Chip Radio Transceiver is a monolithic, integrated radio transceiver optimized for use in a Digital Enhanced Cordless Telecommunications (DECT) system. It is fabricated using National's ABiC V BiCMOS process (f_T = 18 GHz).

The LMX3161 contains phase locked loop (PLL), transmit and receive functions. The 1.1 GHz PLL block is shared between transmit and receive section. The transmitter includes a frequency doubler, and a high frequency buffer. The receiver consists of a 2.0 GHz low noise mixer, an intermediate frequency (IF) amplifier, a high gain limiting amplifier, a frequency discriminator, a received signal strength indicator (RSSI), and an analog DC compensation loop. The PLL, doubler, and buffers can be used to implement open loop modulation along with an external VCO and loop filter. The circuit features on-chip voltage regulation to allow supply voltages ranging from 3.0V to 5.5V. Two additional voltage regulators provide a stable supply source to external discrete stages in the Tx and Rx chains.

The IF amplifier, high gain limiting amplifier, and discriminator are optimized for 110 MHz operation, with a total IF gain of 85 dB. The single conversion receiver architecture provides a low cost, high performance solution for communications systems. The RSSI output may be used for channel quality monitoring.

The Single Chip Radio Transceiver is available in a 48-pin 7mm X 7mm X 1.4mm PQFP surface mount plastic package.

Design Tools

Title	Size in Kbytes	Date
PLL Codeloader Driver Software			View

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More Application Notes

Title	Size in Kbytes	Date
AN-1162: AN-1162 Using the LMX3162 for 2.4-GHz ISM Band	370 Kbytes	1-May-04	Download
AN-1166: Application Note 1166 Using the LMX5001 Bluetooth Link Controller	215 Kbytes	1-May-04	Download