National Semiconductor Considerations In Implementing Chip-On-Board and Multi-Die Assemblies

Mark McClintick, Process Engineer

MODERATOR: 

Hello and welcome to today's National Semiconductor Online Seminar. I'm Michelle Miller and I will be your host.

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Finally, National Semiconductor owns and is responsible for all the content in this seminar. Today's topic is "Considerations in Implementing Chip-On-Board and Multi-Die Assemblies." Today's seminar will be given by Process Engineer, Mark McClintick.

Welcome, Mark.

McCLINTICK: 

Thank you, Michelle.

The June seminar, Converting from Surface Mount Technology to Die, addressed trends and drivers, die options and implementation into the SMT environment. In today's seminar we will examine the manufacturing aspect of unpackaged die as it applies to chip-on-board and multiple die assemblies.

Taking a brief look at today's agenda we will overview the manufacturing flow, examine considerations for each of the process steps, review general layout approaches, and look at some thermal considerations. As a footnote to today's seminar, the terms substrate and PCB are used interchangeably and are not a reference to a particular material type.

Let's review the chip-on-board or multi-die process flow and equipment requirements and its fit in the SMT manufacturing environment. The first step in the process is application of adhesive. Stencil or screen-printing equipment may be used to apply adhesive to the PCB or substrate. Component placement equipment may be able to be upgraded to syringe-type dispensing such as time, pressure and volume metric and the majority of adhesive dispensing today is syringe-type dispensing.

The second step is die placement and adhesive cure. Component placement equipment will require a pick head compatible with handling unpackaged semiconductor devices. Packing tip materials should be ESD protected and contact pressure of the placement heads should be appropriate for die. Vision alignment capability will be needed for small device sizes and depending on the method that feeds the devices to the machine, blind pick and place may not be an option. The capability will be required to control the die adhesive thickness between the PCB and die and cure takes place on either a conveyor or chamber-type oven.

The next step, plasma clean, is an important cleaning step prior to wire bond to remove any contaminants such as die attached epoxy resin bleed on substrate pads. Some SMT manufacturers perform plasma clean on PCBs. Determination of compatibility of this equipment and process for semiconductor devices is required. The die and substrate contact pads are connected using wire bond. This is not part of the SMT process and equipment will need to be acquired.

Encapsulation provides protection for the wires and semiconductor device. This is typically applied with syringe-type dispensing equipment, but is not part of the SMT process. Dispensing cure equipment will need to be acquired. Curing equipment is typically a conveyor or chamber-type oven although the conveyor oven may not be practical due to the long cure time.

This is a chip-on-board assembly sequence using a laminate substrate. Moving left to right, the first photo is a substrate as received in the assembly line. The white ring is a barrier to restrict spread of the encapsulant. Silver filled epoxy adhesive is then dispensed on the die attached pad, then die placement onto the adhesive, and adhesive cure takes place. Wire bond is the next step and in this case aluminum wedge bonding was used. Finally, liquid encapsulation takes place and then the encapsulant is cured.

When a subsystem assembly design combines die and surface mount components, what is the manufacturing sequence? Often a small form factor design will combine SMT and die to meet cost performance requirements. SMT first, then chip-on-board is the preferred flow because the issues are easier to manage. There are issues to be aware of with either approach, so we will discuss both.

Chip-on-board first, then SMT. This option is typically used when board design does not allow enough clearance between the surface mount device and the die for the wire bonding tool. Solder paste printing may be a challenge due to the stencil having to clear the die. Note in the diagram the clearance is designed into the stencil to accommodate the die. Also the squeegee design has to accommodate the profile to the stencil clearances. Since chip-on-board process is first, there may be opportunities for moisture absorption. This could cause contamination, popcorn effect, or encapsulant cracking and SMT reflow. Moisture absorption in larger encapsulated die can cause the same behavior as packaged parts. As in package devices, use of lead-free solders will increase the moisture sensitivity. Understanding thermal hierarchy is important to ensure that SMT reflow attempts are compatible with chip-on-board epoxies. The implementation of higher, lead-free solders makes attention to material compatibilities more critical.

SMT first, then chip-on-board. Increased risk of contaminating substrate bonding pads and die attach area with solder process materials is a concern. To prevent yield and reliability issues, the post-PCB cleaning process needs to be evaluated to ensure complete removal of contaminants. In regards to thermal hierarchy, avoid the die attaching adhesive that causes surface mount device solder to reflow. Mounted capacitors have the potential to be electrostatically charged affecting static sensitive semiconductor devices. Proper ESD control practices will minimize risks. In the next section we will look at the process considerations for each of the manufacturing steps.

Die attach is the initial point where the cingulated die are introduced into the assembly process making shipping media compatibility with the placement equipment a must. Also, the type of shipping media selected is a factor in manufacturing efficiency. Because of this it is important to understand the options, benefits, and tradeoffs.

In the next few slides we'll review the most common die shipping media types. The first is a diced wafer on film frame which is pictured on your slide. The dice wafer remains on the frame mounted dicing tape. They may be shipped in a cassette that holds up to 25 frames. A needle or pushpin is required to remove the die from the tape. Feeders are available for component placement equipment that removes the die from the dicing tape and stage them minimizing delays for the component pick head. Storage life on dicing tape may be limited to the pressure sensitive adhesives used and therefore intended for immediate use. Over time these adhesives increase in tendency to transfer to the silicon. A UV released tape would not have this issue. There are no film frame industry standards, so be aware of the format your die supplier offers.

The waffle tray is the most commonly used shipping media. The trays are available with 2-inch or 4-inch tray sizes with 2-inch being the most popular. The tray has a matrix of cavities designed in the X, Y, and Z dimensions to minimize die movement and is typically made of a black ESD conductive polypropylene or polycarbonate material. Polycarbonate gives better performance for dimensional stability.

There are a couple options to feed dies from waffle trays to the component placement equipment, the first of which is a fixture plate, which holds a number of trays. The trays may be arranged on the plate to accommodate a high mix of device types. This is a relatively low cost approach, however, production time is lost and fixture plates need replenishment. Also, manual handling presents a greater risk for spilling die and open trays increase risk of die contamination.

Another option is a tray feeder, which automatically changes the waffle tray. This type of feeder is higher cost, however, manual tray handling and cycle time penalties are minimized.

A gel-pak uses an elasto-membrane material that holds the die in place with no X, Y, or Z-axis movement. Gel-paks are a good choice for fragile devices since it is the contact during shipment such as very thin die or image sensors. Gel-paks require a vacuum to be applied to the back of the try to enable release of the die. Even with the vacuum applied for release there is some level of membrane contact with the die requiring additional time to remove the devices.

Our last shipping media type is carrier tape on reels. There are two types of carrier tapes commonly used for cingulated die. First, the surf tape, which is a punch carrier that uses a pressure sensitivity adhesive or PSA, at the bottom of the cavity to hold the die in place. There is no X, Y or Z movement. A gap in the PSA film facilitates removal of the die without piercing or contacting the film. This type of carrier tape requires a special feeder with a pushpin to remove the die from the PSA tape. The special feeder may have a higher cost than the standard carrier tape feeders. Devices on surf tape have a limited shelf life and are intended for immediate use. Being that the pressure sensitive adhesive tape used on this product is the same blue tape used for wafer dicing, the same adhesive transfer characteristic occurs here.

The second type is embossed pocket tape, which is the best choice for lowest cost. The pocket is designed in the X, Y, and Z dimensions to minimize die movement. PSA or heat-sealed cover tape keeps components in the tape pocket. PSA tape provides a more uniform peel when removing the cover tape. This is important in preventing vibrations in the carrier tape which can cause the components to fly out of the pocket, especially very small and thin die.

Carrier tape is well suited for high volume for a couple of reasons. The first is inventory management. A large quantity of die may be wound on a compact reel. The 7-inch reel pictured here contains 7,000 devices. This same 8-millimeter wide, 4-millimeter pitch tape on a 13-inch reel would contain approximately 20,000 die. Banks of reels may be kitted based on subassembly production run needs. Exposure of devices to the environment is minimized, reducing the risk of contamination. The devices are either sealed or held in the tape cavity eliminating the risk of spilling die.

The second reason is production cycle time enhancement. Comparable devices, on reels, can be presented in bank fashion to the pick and place machine. Banks of reels on a cart may be exchanged quickly to replenish components or to reconfigure for a new subassembly production run. Also, the device is presented to the pick head in the same location each time, reducing vision alignment search time.

Adhesive application. Epoxies are the most common adhesive used for wire bonded die and, therefore, will be the primary focus during this seminar. Epoxies may be electrically conducted, such as silver filled materials, or they may be thermally conductive such as aluminum filled materials. Single part epoxies are frozen to maintain shelf life and require proper time to bind. Epoxies generally cure at 150°C for approximately 30 to 60 minutes. Also, there are snap cure materials, which cure in roughly 60 seconds. There are some other less common chip-on-board adhesives such as silver filled glass. This type of adhesive is fired at a higher temperature, roughly 6 to 8 minutes at 300 to 400°C, and this material is inorganic after the firing is complete. Also there are solders such as gold pin, gold silicon and high lead.

There are several approaches to applying adhesives. Printing is the most cost effective method and it is best fit for high volume, low product mix. Stamping is another approach. It's not as cost effective as printing, but offers more flexibility with higher product mixes. For this approach a reservoir with adhesive maintained at a controlled height is necessary. The third option is dispensing, which is most common; more expensive and higher cycle time, but offers the greatest level of flexibility. It's very good for high product mix environments where flexibility is critical. Since the adhesive is contained in a syringe, this technique offers better material control and handling. With either stamping or dispensing, be careful not to use patterns or matrixes of individual dots which can trap pockets of air. No matter which application method is used, an adhesive reology (phonetic) must be selected that is compatible with the method. This is best accomplished by working with your adhesive supplier.

The goal of any choice of adhesive application method is a repeatable volume, pattern, and location. The adhesive meniscus dies for epoxy, and I'm referencing the diagram on the left of the slide, the adhesive meniscus for epoxy should be 0 to 50 percent of the die height. Epoxy or substrate characteristics that exhibit resin bleed will be limited to much less than 50 percent of the die height. Resin bleed is a surface tension related characteristic which is dependent upon the nature of the epoxy resin and the substrate surface. The resin will separate and flow out from the adhesive compound onto the substrate. Silver filled glass meniscus size should be 10 percent to 50 percent of the die height. The presence of a fillet is important for proper evolving of solvents and other organic components out of the adhesive during firing.

Bond line coverage, referencing the diagram on the right. Complete adhesive coverage under the die area is important. Unsupported regions of the die may be subject to cracking or breakage. Areas with no adhesive coverage will have higher thermal resistance and may present hotspot issues for power devices. In regards to encapsulation, areas of insufficient coverage trap air causing voids. For the bond line, please reference the upper center diagram. The bond line is the layer of adhesive between the substrate and the die. Inability to control the bond lines will impact adhesive fillet control. More or less adhesive is being displaced depending on how far the die is pushed into the adhesive.

The epoxy thickness should be 13 to 76 microns. A thicker bond line doesn't necessarily improve adhesion and negatively impacts thermal resistance. Silver filled glass should have a bond line thickness of 50 to 100 microns. Thinner bond lines may significantly reduce adhesion strength, however, thermal resistance is not significantly affected by thickness changes. Alignment of the X, Y position should be within 50 microns of the target position and for rotation, it should be less than 2 degrees and fine pitch devices as close to zero as possible.

The planarity of the die should be less than 76 microns for 25 millimeters of length. A die surface with a greater angle will cause difficulties to the wire - wire bond division alignment system and this is due to a change in the reflective light. Also, the angle of the die will also effect the size of the fillet meniscus. That one side of the die will have insufficient fillet and the opposite side will have excessive.

Proper die placement should be performed with a vacuum pickup tip that has ESD protective characteristics. This applies to both manual or automated equipment. Tweezers are not acceptable for die handling. Tweezers frequently cause edge damage and easily slip causing damage to die circuitry. The photo example on the right is an example of tweezer damage that caused electrical test fallout. You'll notice the tweezer marks on the metalized portion of the die. For tip material recommendation, conductive polyimide is a good choice. It is commonly impregnated to provide ESD protection. Also, it has a much longer life than soft L-ring and it's resistant to particle embedment. Rubber is another choice. It is damage free but is more easily embedded by particles, and ESD protective styles are not always available, so be sure to understand the type your supplier is offering.

Die that are less than 254 microns thin require additional care and handling to prevent cracks or breakage. As device thicknesses decrease, and/or area increases, more attention to this factor is necessary especially with wafer thinning technology continuing to push the envelope with thinner devices. When removing devices from the dicing tape with piercing-type needles, be sure to provide a multi needle pattern that supports the die.

Another die removal option, the thin die, is to use UV release tape. Exposure to ultraviolet light significantly reduces the adhesion level that's reducing the stresses of removing the die. Keep in mind that some semiconductor devices are not compatible with UV energy and pushing thin die into the adhesive pickup tips should provide support over the majority of the device circuits. Also, the speed which this device is pushed into the adhesive may need to be reduced on large devices.

Polyimide passivation is a stress buffer to protect against stress induced from plastic encapsulation. This material is soft and can be damaged if handled improperly. A rubber pickup tip typically is the only pickup tip material that is compatible with polyimide coated devices.

Plasma clean is an important step to ensure contamination free surfaces for wire bond and liquid encapsulation considering the bond pads epoxy materials outcast during cure potentially depositing contaminants on the surface of the die which may contribute to corrosion or a poor bond weld. Epoxy resin may flow out from the adhesive, and if it's extensive enough will form a non-bondable film on the substrate bond pad. The extent of flow is dependant on the characteristics of the resin and surface texture of the substrate.

Regarding liquid encapsulation, containment that is on the surface of the die or substrate can impair the adhesion of the epoxy encapsulate. Contaminants can also be a contributor to void formation. Because of these factors, it is our recommendation and an industry practice to perform an oxygen or argon plasma clean prior to a wire bond to remove halogens and organic contaminants.

This is an (inaudible) analysis of an argon plasma etch performed on a gold plated substrate bond pad. Not only does the plasma clean remove organic contaminants, it also removes nickel oxide, which has migrated to the gold plated surface. Nickel oxide inhibits wire bonding, especially bonding with gold ball wire. Note the lower spectrum. The elimination of nickel and the post plasma etch spectrum has been completely removed.

An understanding of the die bond pad metallization is an important part of a reliable wire bond process. Semiconductor IC manufacturers do not all use the same bond pad metallurgy, but typically it's aluminum with either a silicon or copper or gold as part of the alloy. One of the factors that has a significant impact on bondability is the percentage of copper in the pad metal alloy. Copper in the bond pad metal has the effect of making the metal harder. Amounts greater than 2 percent will impact on ability making formation of the well difficult.

Just as it is important to understand the die bond pad, it is also important to understand the characteristics of the substrate bond pad. The bond pad in this photo is a type found on a thick film or low temperature co-(inaudible) ceramic substrate. The pad is created with a conductive ink, which is a mixture of conductive particles and glass. In the case of the bond pad pictured here, the metal is gold. The glass function is to bind the mixture together and provide adhesion to the substrate. The hardness of the pad is affected by the percentage of glass. If the amount of glass is too high, forming a bond will be difficult. However, this can be corrected by working with a substrate supplier to adjust the percentage of glass to optimize wire bonding. Depending on how the pace is fired, glass can migrate to the surface forming glass rich regions. This will also inhibit bond formation due to the increased hardness of the bond pad surface. The substrate supplier can adjust the firing profiles to minimize migration of the glass.

The metal plated pads in the left photo are typical of those used on laminate substrates. Generally electroless nickel/immersion gold is used to provide a wire bond surface for either aluminum wedge or gold ball bonding. The minimum plated thickness of the bond pad should be 100 micro inches of nickel and 50 micro inches of gold. The surface of the pad should be flat and smooth. This can be seen in the photo on the left. On the right is an unacceptable condition for substrate bonding. Notice that the pad's a curved profile and a rough surface condition. These may be indicators of a metal etch problem.

In the next few slides we'll look at some wire bond process control items. Testing the strength of the welds is not only important to validate equipment setup; it is a necessary component to process control. Wire pull is valid to test wedge bonds, however, it is insufficient for ball bond. In most cases the area of the ball well is much greater than the area of the wire. In a pull test this results in the wire breaking before the ball fails, even a poorly welded ball. Proper testing of the ball bonding process requires wire pull for the crescent bond on the substrate pad and ball shear for the ball bond.

Wire bond welds should be consistent in size. Inconsistency may be an indicator of improper programming of the weld parameters or an indicator of an equipment problem. Looking at the photo on the left, wire bond dimension A is at the minimum limit for the required bond pad width. Wire bond dimension B represents what would be typical for an acceptable process. If the bond is too small, the weld may be insufficient and weak. A highly deformed bond or too wide, may be weak at the transition point from Y diameter to deformed area due to work hardening or may have caused damage to the bond pad metallization. The wire bond should be located within the boundary defined by the bond pad metal opening in the semiconductor IC. Welds that occur outside of this area shatter the seal of the protective passivation layer. Also the welded area of the bond is smaller, weakening the strength.

The photo on the right indicates the bond pad centerline with blue dashed lines and the bond weld centerline with red markers. Notice the bonds are wandering off to the left of the pad centerline. The bond in the forefront of the picture is properly centered; whereas, the bond weld in the background is partially occurring on the die passivation.

Another important component of wire bond process control is bonding wedge or capillary monitor. The monitor should include scheduled visual inspection of the tools for contamination or wear, tracking the bonding tools' time in operation to enable removal of the tool from service at end of life. The photo on the left shows the bonding surface of a new wedge bonding tool. Note the surface is clean and free of wear or damage. The old tool on the right shows contamination and significant wear from wire.

The left photo shows the bonding surface of a new ball bonding capillary. Note the surface is clean and free of wear or damage. The old capillary on the right shows significant contamination around the tip surface. The hole at the tip is plugged by a compressed ball, which may have been due to a failed weld that pulled off the pad.

Metal lift off typically applies to wedge bonding only. This is a condition where the bond pad, the very metal there, are pulled away with a wire bond weld exposing underlying dielectric. The photo on the upper right shows an example of metal lift off. The outline of the bond weld mark can be seen. Note the circular area on the right side of the weld mark because the metal layers have been torn away. Metal lift off may be caused by one or both of the following conditions. The first is bonding parameters. The force with which the bond tool contacts the bond pad may be too high or it may be too low. If the force is too high, the impact may fracture the underlying material allowing the pad metal to be pulled away with the wire bond. If the force is too low, the contact of the tool on the pad will not be adequately dammed allowing the tool to repeatedly impact the pad. This also may fracture the underlying material allowing the pad metal to be pulled away with the wire bond.

The second factor is wire drag. Bonding tool contamination can generate significant resistance to wire feed through the tool. The drag on the wire can pull the bond off the pad, tearing away the pad metal. Excessive wire loop heights can cause resistance to wire feed due to the angle of the wire exiting the bonding tool. As in the case of tool contamination, the drag on the wire can pull the bond off the pad, tearing away the pad metal. Some bonding wedge manufacturers have addressed the requirement of chip-on-board wire bonding with tool designs that provide a smooth wire path with improved feed characteristics.

A few words about fine pitch bonding. Fine pitch wire bonding is generally defined as a pitch 125 microns or less. The larger pitches standard bonding tools provide the necessary clearances of proper wire bonds. At smaller pitches, however, the bonding tool dimensions do not provide adequate clearance causing dense or damaged wires. The diagram on the left shows an example of interference that a standard bonding wedge causes on a fine pitch layout. The diagram on the right shows the design of a fine pitch bonding wedge with clearances provided to avoid contact with adjacent wires or wire loops. Even though the diagram describes the wedge bonding tool, the same wide clearance design principles apply to ball bonding capillaries.

Liquid encapsulants are typically either epoxy or silicon based with epoxy being the most common. Encapsulants for die should be opaque unless specifically required for the application. There are several methods to encapsulate chip-on-board devices. The first method is the transfer mold. High volume applications which have designs compatible with a mold cavity can benefit from this low cost approach. This method also provides a good surface for marking. The second option is printing. This is another low cost method for high volume and low product mix. Its surface mount package parts are already on substrate; clearances in the central need to be considered. A third option is syringe dispense. This dispensing is more expensive and has a higher cycle time, however, process flexibility and material control are two of the driving factors that make this method the most common approach especially in today's high product mix manufacturing environment.

Syringe dispense being the most common method will be the focus of this discussion. Irregardless of the methods used, the encapsulant must be selected that is compatible with the application process. This is best accomplished by working with your encapsulant supplier.

The typical syringe dispense methods of encapsulation are shown in the diagrams on this slide. On the upper left single viscosity with no flow control dam. This is the simplest approach used in applications where dispensing volume accuracy is not critical.

Single viscosity with flow control dam. This is a variation to the above method by adding a barrier around the wire bonding component. Depending on the height of the dam, a lower viscosity material may be used. A lower viscosity provides better flow characteristics and reduces risk of air entrapment. The barrier may be a silicon bead or other built up parameter on the board. This method is used where proximity of adjacent components requires limitation of encapsulant spread.

Double viscosity. A high viscosity encapsulant is dispensed to form a barrier followed by a low viscosity material to fill and cover the device. Not having the mechanical flow control dam provides additional clearances from the substrate that may be needed for die attach or wire bond processing.

And the last option is a potting dam. This method uses a high ring to limit the encapsulant flow. The potting dam is typically used in applications that require encapsulation of multiple or complex components.

This is an example of a typical single viscosity encapsulation process. In the first step the assembly is preheated to 100°C and the encapsulant is preheated to 60°C. This ensures optimum flow of the material. The preheat is also applied for the remaining dispensing steps in the process. A line of encapsulant is then dispensed forming the perimeter of the area to be filled. The next step dispenses a shallow amount of encapsulant to cover the substrate area, wire bond, and die attach area. This minimizes the potential for trapped air. The final step completes the fill by covering the die and wires with encapsulant. The dispense pattern is usually in a spiral form from center out or perimeter inward. Typical cure time is 2 hours at a temperature of 150°C.

Here is an example of a typical duel viscosity or dam and fill encapsulation process. In the first step the assembly is preheated to 100°C. The encapsulant used to create the dam is not preheated to maintain its high viscosity. A line of the high viscosity encapsulant is then dispensed forming the perimeter of the area to be filled. The next step requires preheat applied to both assembly and encapsulant. A low viscosity encapsulant is dispensed until the dam is filled covering the substrate area, die attach area, and wire bonds. The dispense pattern is usually in a spiral from center out or perimeter inward. Typical cure time is 2 hours at a temperature of 150°C.

Some critical factors to consider for the encapsulation process: storage conditions, thaw times for frozen encapsulant, preheat requirements, stage time before cure, cure schedule requirements, and dispense equipment requirements.

In the next few slides we will cover chip-on-board and multi-die general layout guidelines that are important to this assembly approach. Any of the dimensions given are intended to be starting points and will need to be optimized for your particular application. When designing a substrate, consideration should be given to the location of the chip-on-board or wire bonded device. Due to insertion stresses, die should not be in close proximity to through hole components such as leaded through hole package parts or connectors. If the substrates are in vitreous form as a panel, attention should be given to the stress level of the simulation process. Die should not be located near the edge of a substrate if a high stress method is used. Proximity to surface mount devices should be accounted for to allow proper clearance for wire bonding. Most of the die processing will be performed first.

The die attach pad not only serves as the attachment area but also provides planarization to the topography of the underlying circuitry. The pad material may be solder mask, dielectric in the case of ceramic, or plate metal pads such as the copper, nickel, gold on a laminate substrate.

Some devices require an electrical connection to the backside and will need a conductive pad tied to the appropriate trace. Be sure an electrically conducted adhesive is specified. Your die supplier's datasheet should specify backside electrical connection requirements. Die datasheets for National Semiconductor design are available on our die products Website that you can see on the bottom of your screen today.

Die attach area dimensions. The die edge to die attach pad edge should be a minimum of 254 microns. This provides space for adhesive meniscus. Die attach pad edge to wire bond pad edge should be a minimum of 254 microns. This provides clearance for wire bond and potential epoxy resin bleed.

The photo on the left is an example of a die attach area on your laminate substrate. The die attach pad uses solder masks to provide planarized attachment areas and isolation from underlying circuitry. The right photo is an example of a die attach area on ceramic substrate. The die attach pad uses a dielectric layer to provide a planarized attachment layer and isolation from underlying circuitry. Note that the area under the die attach pad is used for two embedded resistors. Low temperature of co-(inaudible) ceramic has an advantageous option of being able to embed passive components.

Layout considerations for the encapsulation area. No alignment holes or unfilled plated through holes are allowed in the encapsulation area because the liquid encapsulant will run out through the holes. Allow proper clearance from other components, including other encapsulated devices. If design requirements do not allow space for flow of single viscosity encapsulant, use a dam and fill, a mechanical dam, to limit the flow. A general distance between the wire bond pad and surface mount component pad is 203 microns. Consideration should be given to manufacturing tolerances for surface mount devices and tolerance for the encapsulant flow characteristics.

Devices that have a large pitch will have substrate wire bond pads on a similar layout pitch. Current substrate technology can accommodate the required conductive lines and spaces and substrate bond pad size is not an issue. Generally the substrate bond pad size should be 203 microns wide and 381 microns long. Substrate technology will accommodate a smaller bond pad. However, the tradeoff will be a smaller wire bond process window.

When the die pad attach pitch decreases to fine pitch levels, minimum substrate lines and spaces, bond pad sizes and wire separation requirements cannot accommodate these dimensions. This translates to a fan out or larger substrate bond pad pitch. The larger substrate pad pitch creates a couple of factors that need to be considered for a substrate bond pad layout, first of which is wire exit angle with respect to adjacent die bonds.

Reference the upper circled area on the right diagram. The change in wire angle at corner pads may be enough to cause the bond tail of the wedge bond to contact the bond tail of the adjacent wire. As a guideline for wire exit angles, the angles need to increase as the bond pad pitch decreases to prevent bond interference and provide proper wire separation. The second factor is wire angle with respect to substrate bond pad. Reference the lower circle on the right diagram. As the angle of the wire increases relative to the substrate bond pad, the size of the target for the bonding area decreases. The diagram on the right shows the best approach of a substrate bond pad. The angle of the substrate pad should match the bond wire. This maximizes the substrate pad area to place the bond.

A radial pad arrangement is the preferred pad layout for fine pitch chip-on-board or multi-die design. This type of layout is effective at maintaining angle of substrate pad and wire, wire-to-wire separation, and exit angle from the die bond pad. Note the photo on the right for exit angle details.

Layout of bond pads in a staggered array is an option for maximum bond type density. We're given minimum lines and space specifications. Note in the diagram that required bond pad size is maintained even though the bond pad pitch is reduced. If the bond pads were inline at the same pitch instead of staggered, the minimum spacing requirements would be violated. The staggered array approach may avoid specifying a more costly, higher density substrate for the application.

Alignment fiducials or marks are important features to provide consistent and accurate vision system alignment for substrate for die attach, wire bond, and encapsulation. As a minimum there should be two alignment marks at opposing corners of the substrate. The recommended alignment mark is a horizontal and vertical line in the form of a cross. The alignment fiducials should be well-defined patterns with sharp, minimally radius corners. As you can see in the photo, there are variations used for the alignment mark. In this example a right angle was used instead of a cross.

Laminate substrates should have a solder mask exclusionary around the alignment mark. This will ensure that the solder mask registration does not interfere with the mark. Also, alignment marks should be created as part of the same layer as the wire bond pad. With this approach, any changes in registration for the bond pad layer will not affect location of the bond wires.

Thermal conditions. Within specified operating conditions, semiconductor devices dissipate certain amounts of heat depending on the devices, function, and design. If the maximum junction temperature rating is exceeded, the device will either shutdown if it has protected circuitry, or destruct. To ensure that the maximum junction temperature is not exceeded, it is necessary to understand the maximum ambient temperature and the thermal characteristics of the assembly materials.

The two tables show examples of thermal conductivity for various substrate and die attach materials. Note the range of values. For a substrate material, substrate ceramics are better heat conductors than glass epoxy laminate. The silver filled glass adhesive is a much better thermal conductor than silver filled epoxies.

This is a simplified thermal model to show how junction temperature for a particular set of conditions is determined. The model structure represents a die, epoxy attached on an FR4 substrate. Referring to the model on the left, the heat dissipation by the die flows downwards through the silver filled epoxy die attach pad and the FR4 substrate as it is transferred to the ambient environment. The heat flow to the ambient environment can be represented by an equivalent circuit. PCB is the power dissipation of the die and each layer of the assembly has an equivalent series resistor. The thermal resistance is based upon the layer thickness and area and the materials' thermal conductivity. Note that the FR4 substrate is clearly the largest resistance to heat flow.

Junction temperature calculation is the sum of the environment temperature and the product of the device power dissipation and total thermal resistance, and that calculation can be seen underneath the model on the left. The junction temperature in this model is 72°C. If this device was rated for 125°C max junction temp, this design would not have exceeded the limit.

These are several techniques to enhance heat removal from a device. High power applications may require a more complex thermal management solution. One enhancement option is the die attach pad. A metal die attach pad will act as a heat spreader to dissipate heat from the die. Pad effectiveness is proportional to the thickness in the area of the metal and also the type of metal is a factor.

For a more substantial dissipation of heat a heat spreader may be used such as a solid plate or grid of metal and this needs to be within the substrate under the device. Also, use of ground or power planes will act as a heat spreader. Thermal vias can be used to enhance heat dissipation by providing more substantial thermal pads to vary heat spreaders as shown in the left diagram. Thermal vias can also be routed to the opposing side of the board to be used in conjunction with a heat sink as shown on the right diagram.

For your reference I have a bibliography here and that can be accessed later on in the archive version, which should be available several hours after we complete the seminar.

That concludes our presentation. I'll turn it over to Michelle for our survey and to begin the question and answer portion.

MODERATOR:

Thank you, Mark. That was an excellent presentation.

Before we begin the question and answer portion, I'd like to invite our viewers to please fill out and submit the survey form which should be appearing on your screen shortly. Your answers to this survey will help us in the development of new products, as well as future seminars.

Now, if you have additional questions on this topic, please enter them in the question form and submit. We will address as many of them as time permits.

Mark?

McCLINTICK: 

Thank you, Michelle.

Our first question is, what is popcorn effect? This effect is caused by the absorption of moisture into the plastic or in the case of our seminar today, the epoxy encapsulant. When the reflow process takes place, the absorbed moisture changes to a vapor and expands. The expansion can be to the point where a popping or cracking effect takes place.

Our next question, what about maximum wire lengths? Maximum wire lengths need to be considered to prevent wire sagging or side-to-side deviation of the wire. Both conditions present the risk of unacceptable contact with other conductive elements.

I do have some guidelines for maximum wire lengths. But keep in mind these are general in nature and will vary depending on the application and equipment capabilities. For a wire diameter that is 20 to 25 microns, a max length should be around 2 millimeters. For a wire diameter of around 32 microns, the maximum length would be around 3 millimeters. If your wire is 38 microns, the max wire length would be around 3.5 millimeters.

Another question. What are the moisture considerations with die attach adhesives if the package is not hermetic? There are some adhesives such as sine esters (phonetic) and silver filled glass that absorb moisture more actively than others. This is an advantage for achieving low water vapor levels in hermetic packaging. However, in non-hermetic circumstances, it will absorb moisture to the point of adhesion failure.

Another question. What are the differences between epoxy and silicon encapsulants? The majority of liquid encapsulation is done with epoxies. Silicons are used for special applications requiring a very flexible, low stress and high temperature material.

Our next question. ISMP component placing system does not have the V axis accuracy of the die adhesive bond line control. Are there options? Yes there are. Some adhesive manufacturers offer the option of spacers mixed in the adhesive. At component placement the die will push to the spacers setting the proper bond line.

Next question. Can encapsulants be reworked? It is acceptable to perform rework prior to encapsulant cure, but not after cure. Adding material after cure may exhibit reliability issues at the interface. Usually complete removal of cured encapsulant cannot be accomplished without damaging the die and substrate.

We have time for one more question. When dispensing die attach adhesives, what distance away from the substrate should the needle be positioned? It's dependent on the volume spent, but in general the maximum height is half the inner-diameter of the dispensing tool.

MODERATOR:

Thank you, Mark. That concludes our question and answer portion. Thank you, everyone, for joining us for this seminar, "Considerations in Implementing Chip-On-Board and Multi-Die Assemblies" brought to you by National Semiconductor and Yahoo! Broadcast.

Please remember to fill out and submit your survey form. Thank you for attending and have a good day.

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